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| author | H. Peter Anvin <hpa@linux.intel.com> | 2012-01-19 21:56:50 +0100 |
|---|---|---|
| committer | H. Peter Anvin <hpa@linux.intel.com> | 2012-01-19 21:56:50 +0100 |
| commit | 282f445a779ed76fca9884fe377bf56a3088b208 (patch) | |
| tree | d9abcf526baee0100672851e0a8894c19e762a39 /arch/powerpc/include/asm/mpic.h | |
| parent | x86, tsc: Fix SMI induced variation in quick_pit_calibrate() (diff) | |
| parent | uml: fix compile for x86-64 (diff) | |
| download | linux-282f445a779ed76fca9884fe377bf56a3088b208.tar.xz linux-282f445a779ed76fca9884fe377bf56a3088b208.zip | |
Merge remote-tracking branch 'linus/master' into x86/urgent
Diffstat (limited to 'arch/powerpc/include/asm/mpic.h')
| -rw-r--r-- | arch/powerpc/include/asm/mpic.h | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h index e6fae49e0b74..67b4d9837236 100644 --- a/arch/powerpc/include/asm/mpic.h +++ b/arch/powerpc/include/asm/mpic.h @@ -251,6 +251,9 @@ struct mpic_irq_save { /* The instance data of a given MPIC */ struct mpic { + /* The OpenFirmware dt node for this MPIC */ + struct device_node *node; + /* The remapper for this MPIC */ struct irq_host *irqhost; @@ -293,6 +296,9 @@ struct mpic /* Register access method */ enum mpic_reg_type reg_type; + /* The physical base address of the MPIC */ + phys_addr_t paddr; + /* The various ioremap'ed bases */ struct mpic_reg_bank gregs; struct mpic_reg_bank tmregs; @@ -331,11 +337,11 @@ struct mpic * Note setting any ID (leaving those bits to 0) means standard MPIC */ -/* This is the primary controller, only that one has IPIs and - * has afinity control. A non-primary MPIC always uses CPU0 - * registers only +/* + * This is a secondary ("chained") controller; it only uses the CPU0 + * registers. Primary controllers have IPIs and affinity control. */ -#define MPIC_PRIMARY 0x00000001 +#define MPIC_SECONDARY 0x00000001 /* Set this for a big-endian MPIC */ #define MPIC_BIG_ENDIAN 0x00000002 |