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| author | Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> | 2012-09-10 04:52:57 +0200 |
|---|---|---|
| committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2012-09-17 08:31:53 +0200 |
| commit | 78f1dbde9fd020419313c2a0c3b602ea2427118f (patch) | |
| tree | 9a5c34555b6fba6809ec33798e1aa53ce1ce0f53 /arch/powerpc/include/asm/page_64.h | |
| parent | powerpc/mm: Update VSID allocation documentation (diff) | |
| download | linux-78f1dbde9fd020419313c2a0c3b602ea2427118f.tar.xz linux-78f1dbde9fd020419313c2a0c3b602ea2427118f.zip | |
powerpc/mm: Make some of the PGTABLE_RANGE dependency explicit
slice array size and slice mask size depend on PGTABLE_RANGE.
Reviewed-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/include/asm/page_64.h')
| -rw-r--r-- | arch/powerpc/include/asm/page_64.h | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/arch/powerpc/include/asm/page_64.h b/arch/powerpc/include/asm/page_64.h index 6c9bef4cb6a0..cd915d6b093d 100644 --- a/arch/powerpc/include/asm/page_64.h +++ b/arch/powerpc/include/asm/page_64.h @@ -78,14 +78,18 @@ extern u64 ppc64_pft_size; #define GET_LOW_SLICE_INDEX(addr) ((addr) >> SLICE_LOW_SHIFT) #define GET_HIGH_SLICE_INDEX(addr) ((addr) >> SLICE_HIGH_SHIFT) +/* + * 1 bit per slice and we have one slice per 1TB + * Right now we support only 64TB. + * IF we change this we will have to change the type + * of high_slices + */ +#define SLICE_MASK_SIZE 8 + #ifndef __ASSEMBLY__ struct slice_mask { u16 low_slices; - /* - * This should be derived out of PGTABLE_RANGE. For the current - * max 64TB, u64 should be ok. - */ u64 high_slices; }; |