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author | Suresh Warrier <warrier@linux.vnet.ibm.com> | 2016-08-19 07:35:49 +0200 |
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committer | Paul Mackerras <paulus@ozlabs.org> | 2016-09-09 08:17:59 +0200 |
commit | 4ee11c1a9f7cc20026bb66ac624533310a605312 (patch) | |
tree | a93e00dd3a4598ca60daff910a03079f188b92a4 /arch/powerpc/include/asm/pnv-pci.h | |
parent | powerpc: Add simple cache inhibited MMIO accessors (diff) | |
download | linux-4ee11c1a9f7cc20026bb66ac624533310a605312.tar.xz linux-4ee11c1a9f7cc20026bb66ac624533310a605312.zip |
powerpc/powernv: Provide facilities for EOI, usable from real mode
This adds a new function pnv_opal_pci_msi_eoi() which does the part of
end-of-interrupt (EOI) handling of an MSI which involves doing an
OPAL call. This function can be called in real mode. This doesn't
just export pnv_ioda2_msi_eoi() because that does a call to
icp_native_eoi(), which does not work in real mode.
This also adds a function, is_pnv_opal_msi(), which KVM can call to
check whether an interrupt is one for which we should be calling
pnv_opal_pci_msi_eoi() when we need to do an EOI.
[paulus@ozlabs.org - split out the addition of pnv_opal_pci_msi_eoi()
from Suresh's patch "KVM: PPC: Book3S HV: Handle passthrough
interrupts in guest"; added is_pnv_opal_msi(); wrote description.]
Signed-off-by: Suresh Warrier <warrier@linux.vnet.ibm.com>
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
Diffstat (limited to 'arch/powerpc/include/asm/pnv-pci.h')
-rw-r--r-- | arch/powerpc/include/asm/pnv-pci.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/pnv-pci.h b/arch/powerpc/include/asm/pnv-pci.h index 0cbd8134ce81..1b46b52d3212 100644 --- a/arch/powerpc/include/asm/pnv-pci.h +++ b/arch/powerpc/include/asm/pnv-pci.h @@ -12,6 +12,7 @@ #include <linux/pci.h> #include <linux/pci_hotplug.h> +#include <linux/irq.h> #include <misc/cxl-base.h> #include <asm/opal-api.h> @@ -33,6 +34,8 @@ int pnv_cxl_alloc_hwirqs(struct pci_dev *dev, int num); void pnv_cxl_release_hwirqs(struct pci_dev *dev, int hwirq, int num); int pnv_cxl_get_irq_count(struct pci_dev *dev); struct device_node *pnv_pci_get_phb_node(struct pci_dev *dev); +int64_t pnv_opal_pci_msi_eoi(struct irq_chip *chip, unsigned int hw_irq); +bool is_pnv_opal_msi(struct irq_chip *chip); #ifdef CONFIG_CXL_BASE int pnv_cxl_alloc_hwirq_ranges(struct cxl_irq_ranges *irqs, |