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author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2009-07-24 01:15:11 +0200 |
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committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2009-08-20 02:12:38 +0200 |
commit | 29c09e8fbaf65698c51aeffe34acc284a454a38f (patch) | |
tree | e3f48366c63e44354da1085db29b5591705fda06 /arch/powerpc/include/asm/ppc-opcode.h | |
parent | powerpc/mm: Add HW threads support to no_hash TLB management (diff) | |
download | linux-29c09e8fbaf65698c51aeffe34acc284a454a38f.tar.xz linux-29c09e8fbaf65698c51aeffe34acc284a454a38f.zip |
powerpc/mm: Add opcode definitions for tlbivax and tlbsrx.
This adds the opcode definitions to ppc-opcode.h for the two instructions
tlbivax and tlbsrx. as defined by Book3E 2.06
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/include/asm/ppc-opcode.h')
-rw-r--r-- | arch/powerpc/include/asm/ppc-opcode.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h index b74f16d45cb4..ef9aa84cac5a 100644 --- a/arch/powerpc/include/asm/ppc-opcode.h +++ b/arch/powerpc/include/asm/ppc-opcode.h @@ -48,6 +48,8 @@ #define PPC_INST_TLBIE 0x7c000264 #define PPC_INST_TLBILX 0x7c000024 #define PPC_INST_WAIT 0x7c00007c +#define PPC_INST_TLBIVAX 0x7c000624 +#define PPC_INST_TLBSRX_DOT 0x7c0006a5 /* macros to insert fields into opcodes */ #define __PPC_RA(a) (((a) & 0x1f) << 16) @@ -76,6 +78,10 @@ __PPC_WC(w)) #define PPC_TLBIE(lp,a) stringify_in_c(.long PPC_INST_TLBIE | \ __PPC_RB(a) | __PPC_RS(lp)) +#define PPC_TLBSRX_DOT(a,b) stringify_in_c(.long PPC_INST_TLBSRX_DOT | \ + __PPC_RA(a) | __PPC_RB(b)) +#define PPC_TLBIVAX(a,b) stringify_in_c(.long PPC_INST_TLBIVAX | \ + __PPC_RA(a) | __PPC_RB(b)) /* * Define what the VSX XX1 form instructions will look like, then add |