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authorAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>2012-09-10 04:52:55 +0200
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2012-09-17 08:31:51 +0200
commit048ee0993ec8360abb0b51bdf8f8721e9ed62ec4 (patch)
treea26ea6b76ae86d366fcff10dd54a4ecbbd29c8fb /arch/powerpc/include/asm/sparsemem.h
parentpowerpc/mm: Use 32bit array for slb cache (diff)
downloadlinux-048ee0993ec8360abb0b51bdf8f8721e9ed62ec4.tar.xz
linux-048ee0993ec8360abb0b51bdf8f8721e9ed62ec4.zip
powerpc/mm: Add 64TB support
Increase max addressable range to 64TB. This is not tested on real hardware yet. Reviewed-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/include/asm/sparsemem.h')
-rw-r--r--arch/powerpc/include/asm/sparsemem.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/powerpc/include/asm/sparsemem.h b/arch/powerpc/include/asm/sparsemem.h
index 0c5fa3145615..f6fc0ee813d7 100644
--- a/arch/powerpc/include/asm/sparsemem.h
+++ b/arch/powerpc/include/asm/sparsemem.h
@@ -10,8 +10,8 @@
*/
#define SECTION_SIZE_BITS 24
-#define MAX_PHYSADDR_BITS 44
-#define MAX_PHYSMEM_BITS 44
+#define MAX_PHYSADDR_BITS 46
+#define MAX_PHYSMEM_BITS 46
#endif /* CONFIG_SPARSEMEM */