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authorGavin Shan <gwshan@linux.vnet.ibm.com>2014-09-30 04:39:05 +0200
committerMichael Ellerman <mpe@ellerman.id.au>2014-09-30 09:15:17 +0200
commitd1a85eee35f15a20f508c42d7664dce335eefc2d (patch)
treebbef333431dc1942074c1a511da73f0c58678d25 /arch/powerpc/include/asm
parentpowerpc/pseries: Decrease message level on EEH initialization (diff)
downloadlinux-d1a85eee35f15a20f508c42d7664dce335eefc2d.tar.xz
linux-d1a85eee35f15a20f508c42d7664dce335eefc2d.zip
powerpc/powernv: Sync OpalPciResetScope with firmware
The names of PCI reset scopes aren't sychronized with firmware. The patch fixes it. Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/include/asm')
-rw-r--r--arch/powerpc/include/asm/opal.h9
1 files changed, 6 insertions, 3 deletions
diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index f1579419e5c8..a084cf5bd76c 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -387,9 +387,12 @@ enum OpalM64EnableAction {
};
enum OpalPciResetScope {
- OPAL_PHB_COMPLETE = 1, OPAL_PCI_LINK = 2, OPAL_PHB_ERROR = 3,
- OPAL_PCI_HOT_RESET = 4, OPAL_PCI_FUNDAMENTAL_RESET = 5,
- OPAL_PCI_IODA_TABLE_RESET = 6,
+ OPAL_RESET_PHB_COMPLETE = 1,
+ OPAL_RESET_PCI_LINK = 2,
+ OPAL_RESET_PHB_ERROR = 3,
+ OPAL_RESET_PCI_HOT = 4,
+ OPAL_RESET_PCI_FUNDAMENTAL = 5,
+ OPAL_RESET_PCI_IODA_TABLE = 6
};
enum OpalPciReinitScope {