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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2011-05-27 01:58:22 +0200
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2011-05-27 01:58:22 +0200
commit9693ebd4815eefa2b7c8fcc699061a0c8da0c1e7 (patch)
treecd8d8919c18528c26aa78291833b3551c4d33a35 /arch/powerpc/include
parentpowerpc/4xx: Adding PCIe MSI support (diff)
parentpowerpc/fsl_rio: Error interrupt handler for sRIO on MPC85xx (diff)
downloadlinux-9693ebd4815eefa2b7c8fcc699061a0c8da0c1e7.tar.xz
linux-9693ebd4815eefa2b7c8fcc699061a0c8da0c1e7.zip
Merge remote branch 'kumar/merge' into merge
Diffstat (limited to 'arch/powerpc/include')
-rw-r--r--arch/powerpc/include/asm/fsl_lbc.h2
-rw-r--r--arch/powerpc/include/asm/rio.h5
2 files changed, 7 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/fsl_lbc.h b/arch/powerpc/include/asm/fsl_lbc.h
index 5c1bf3466749..8a0b5ece8f76 100644
--- a/arch/powerpc/include/asm/fsl_lbc.h
+++ b/arch/powerpc/include/asm/fsl_lbc.h
@@ -157,6 +157,8 @@ struct fsl_lbc_regs {
#define LBCR_EPAR_SHIFT 16
#define LBCR_BMT 0x0000FF00
#define LBCR_BMT_SHIFT 8
+#define LBCR_BMTPS 0x0000000F
+#define LBCR_BMTPS_SHIFT 0
#define LBCR_INIT 0x00040000
__be32 lcrr; /**< Clock Ratio Register */
#define LCRR_DBYP 0x80000000
diff --git a/arch/powerpc/include/asm/rio.h b/arch/powerpc/include/asm/rio.h
index 0018bf80cb25..d902abd33995 100644
--- a/arch/powerpc/include/asm/rio.h
+++ b/arch/powerpc/include/asm/rio.h
@@ -14,5 +14,10 @@
#define ASM_PPC_RIO_H
extern void platform_rio_init(void);
+#ifdef CONFIG_RAPIDIO
+extern int fsl_rio_mcheck_exception(struct pt_regs *);
+#else
+static inline int fsl_rio_mcheck_exception(struct pt_regs *regs) {return 0; }
+#endif
#endif /* ASM_PPC_RIO_H */