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authorTakashi Iwai <tiwai@suse.de>2010-02-17 14:24:46 +0100
committerTakashi Iwai <tiwai@suse.de>2010-02-17 14:24:46 +0100
commit7fb3a069bc5d3577409c2ae89f89cd264ff85816 (patch)
tree7fe3ba3b95faeecb01e4feafb9288ef4b523c6b3 /arch/powerpc/kernel/head_8xx.S
parentALSA: usbmixer - use MAX_ID_ELEMS where possible (diff)
parentMerge remote branch 'alsa/fixes' into fix/misc (diff)
downloadlinux-7fb3a069bc5d3577409c2ae89f89cd264ff85816.tar.xz
linux-7fb3a069bc5d3577409c2ae89f89cd264ff85816.zip
Merge branch 'fix/misc' into topic/misc
Conflicts: sound/pci/hda/patch_realtek.c
Diffstat (limited to 'arch/powerpc/kernel/head_8xx.S')
-rw-r--r--arch/powerpc/kernel/head_8xx.S12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index 678f98cd5e64..3ef743fa5d7c 100644
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -542,11 +542,11 @@ DARFixed:/* Return from dcbx instruction bug workaround, r10 holds value of DAR
FixupDAR:/* Entry point for dcbx workaround. */
/* fetch instruction from memory. */
mfspr r10, SPRN_SRR0
+ andis. r11, r10, 0x8000 /* Address >= 0x80000000 */
DO_8xx_CPU6(0x3780, r3)
mtspr SPRN_MD_EPN, r10
mfspr r11, SPRN_M_TWB /* Get level 1 table entry address */
- cmplwi cr0, r11, 0x0800
- blt- 3f /* Branch if user space */
+ beq- 3f /* Branch if user space */
lis r11, (swapper_pg_dir-PAGE_OFFSET)@h
ori r11, r11, (swapper_pg_dir-PAGE_OFFSET)@l
rlwimi r11, r10, 32-20, 0xffc /* r11 = r11&~0xffc|(r10>>20)&0xffc */
@@ -768,12 +768,12 @@ start_here:
*/
initial_mmu:
tlbia /* Invalidate all TLB entries */
-#ifdef CONFIG_PIN_TLB
+/* Always pin the first 8 MB ITLB to prevent ITLB
+ misses while mucking around with SRR0/SRR1 in asm
+*/
lis r8, MI_RSV4I@h
ori r8, r8, 0x1c00
-#else
- li r8, 0
-#endif
+
mtspr SPRN_MI_CTR, r8 /* Set instruction MMU control */
#ifdef CONFIG_PIN_TLB