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| author | LEROY Christophe <christophe.leroy@c-s.fr> | 2015-01-19 17:04:44 +0100 |
|---|---|---|
| committer | Scott Wood <scottwood@freescale.com> | 2015-01-30 03:13:10 +0100 |
| commit | cadbfd01468663e8b9f9518a58ef67398a20d06b (patch) | |
| tree | 89c1cb6d6573baa71005f5eebfe21b6716542967 /arch/powerpc/kernel/head_8xx.S | |
| parent | powerpc32: adds handling of _PAGE_RO (diff) | |
| download | linux-cadbfd01468663e8b9f9518a58ef67398a20d06b.tar.xz linux-cadbfd01468663e8b9f9518a58ef67398a20d06b.zip | |
powerpc/8xx: use _PAGE_RO instead of _PAGE_RW
On powerpc 8xx, in TLB entries, 0x400 bit is set to 1 for read-only pages
and is set to 0 for RW pages. So we should use _PAGE_RO instead of _PAGE_RW
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'arch/powerpc/kernel/head_8xx.S')
| -rw-r--r-- | arch/powerpc/kernel/head_8xx.S | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S index d99aac0d69f1..65492d043964 100644 --- a/arch/powerpc/kernel/head_8xx.S +++ b/arch/powerpc/kernel/head_8xx.S @@ -441,9 +441,6 @@ DataStoreTLBMiss: and r11, r11, r10 rlwimi r10, r11, 0, _PAGE_PRESENT #endif - /* invert RW */ - xori r10, r10, _PAGE_RW - /* The Linux PTE won't go exactly into the MMU TLB. * Software indicator bits 22 and 28 must be clear. * Software indicator bits 24, 25, 26, and 27 must be |