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authorOliver O'Halloran <oohall@gmail.com>2017-04-03 05:25:12 +0200
committerMichael Ellerman <mpe@ellerman.id.au>2017-04-05 13:40:21 +0200
commit8f5f525d5b83f7d76a6baf9c4e94d4bf312ea7f6 (patch)
treee83cb2206c82deeb3152fdf77b9395ed452f0a95 /arch/powerpc/kernel/misc_64.S
parentpowerpc: Don't try to fix up misaligned load-with-reservation instructions (diff)
downloadlinux-8f5f525d5b83f7d76a6baf9c4e94d4bf312ea7f6.tar.xz
linux-8f5f525d5b83f7d76a6baf9c4e94d4bf312ea7f6.zip
powerpc/64: Fix flush_(d|i)cache_range() called from modules
When the kernel is compiled to use 64bit ABIv2 the _GLOBAL() macro does not include a global entry point. A function's global entry point is used when the function is called from a different TOC context and in the kernel this typically means a call from a module into the vmlinux (or vice-versa). There are a few exported asm functions declared with _GLOBAL() and calling them from a module will likely crash the kernel since any TOC relative load will yield garbage. flush_icache_range() and flush_dcache_range() are both exported to modules, and use the TOC, so must use _GLOBAL_TOC(). Fixes: 721aeaa9fdf3 ("powerpc: Build little endian ppc64 kernel with ABIv2") Cc: stable@vger.kernel.org # v3.16+ Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/kernel/misc_64.S')
-rw-r--r--arch/powerpc/kernel/misc_64.S4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S
index ae179cb1bb3c..c119044cad0d 100644
--- a/arch/powerpc/kernel/misc_64.S
+++ b/arch/powerpc/kernel/misc_64.S
@@ -67,7 +67,7 @@ PPC64_CACHES:
* flush all bytes from start through stop-1 inclusive
*/
-_GLOBAL(flush_icache_range)
+_GLOBAL_TOC(flush_icache_range)
BEGIN_FTR_SECTION
PURGE_PREFETCHED_INS
blr
@@ -120,7 +120,7 @@ EXPORT_SYMBOL(flush_icache_range)
*
* flush all bytes from start to stop-1 inclusive
*/
-_GLOBAL(flush_dcache_range)
+_GLOBAL_TOC(flush_dcache_range)
/*
* Flush the data cache to memory