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authorNicholas Piggin <npiggin@gmail.com>2018-02-20 20:08:29 +0100
committerMichael Ellerman <mpe@ellerman.id.au>2018-03-31 15:47:50 +0200
commit471d7ff8b51b63521c8ea35c51966ab4caa434ee (patch)
tree697babe0784be6808eeb49f12cba44dc937af05e /arch/powerpc/kernel/prom_init.c
parentpowerpc: Remove unused CPU_FTR_ARCH_201 (diff)
downloadlinux-471d7ff8b51b63521c8ea35c51966ab4caa434ee.tar.xz
linux-471d7ff8b51b63521c8ea35c51966ab4caa434ee.zip
powerpc/64s: Remove POWER4 support
POWER4 has been broken since at least the change 49d09bf2a6 ("powerpc/64s: Optimise MSR handling in exception handling"), which requires mtmsrd L=1 support. This was introduced in ISA v2.01, and POWER4 supports ISA v2.00. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/kernel/prom_init.c')
-rw-r--r--arch/powerpc/kernel/prom_init.c10
1 files changed, 1 insertions, 9 deletions
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c
index 0323e073341d..e181fdea3da9 100644
--- a/arch/powerpc/kernel/prom_init.c
+++ b/arch/powerpc/kernel/prom_init.c
@@ -1810,16 +1810,8 @@ static void __init prom_initialize_tce_table(void)
* size to 4 MB. This is enough to map 2GB of PCI DMA space.
* By doing this, we avoid the pitfalls of trying to DMA to
* MMIO space and the DMA alias hole.
- *
- * On POWER4, firmware sets the TCE region by assuming
- * each TCE table is 8MB. Using this memory for anything
- * else will impact performance, so we always allocate 8MB.
- * Anton
*/
- if (pvr_version_is(PVR_POWER4) || pvr_version_is(PVR_POWER4p))
- minsize = 8UL << 20;
- else
- minsize = 4UL << 20;
+ minsize = 4UL << 20;
/* Align to the greater of the align or size */
align = max(minalign, minsize);