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authorKumar Gala <galak@kernel.crashing.org>2008-06-16 16:41:32 +0200
committerKumar Gala <galak@kernel.crashing.org>2008-06-18 23:17:56 +0200
commit3dfa8773674e16f95f70a0e631e80c69390d04d7 (patch)
tree95e8989bbc8373e61f69ca2ac4c98ffd3c709bd9 /arch/powerpc/kernel/setup_32.c
parentpowerpc/booke: Fix definitions for dbcr[1-2] and dbsr registers (diff)
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powerpc/booke: Add support for new e500mc core
The new e500mc core from Freescale is based on the e500v2 but with the following changes: * Supports only the Enhanced Debug Architecture (DSRR0/1, etc) * Floating Point * No SPE * Supports lwsync * Doorbell Exceptions * Hypervisor * Cache line size is now 64-bytes (e500v1/v2 have a 32-byte cache line) Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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