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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2008-12-18 20:13:32 +0100
committerPaul Mackerras <paulus@samba.org>2008-12-21 04:21:16 +0100
commit7c03d653cd257793dc40520c94e229b5fd0578e7 (patch)
treec2beffddec486c47f8ec6df5c3b592c143380559 /arch/powerpc/kernel/swsusp_32.S
parentpowerpc/mm: Rework context management for CPUs with no hash table (diff)
downloadlinux-7c03d653cd257793dc40520c94e229b5fd0578e7.tar.xz
linux-7c03d653cd257793dc40520c94e229b5fd0578e7.zip
powerpc/mm: Introduce MMU features
We're soon running out of CPU features and I need to add some new ones for various MMU related bits, so this patch separates the MMU features from the CPU features. I moved over the 32-bit MMU related ones, added base features for MMU type families, but didn't move over any 64-bit only feature yet. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/kernel/swsusp_32.S')
-rw-r--r--arch/powerpc/kernel/swsusp_32.S6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/powerpc/kernel/swsusp_32.S b/arch/powerpc/kernel/swsusp_32.S
index 77fc76607ab2..b47d8ceffb52 100644
--- a/arch/powerpc/kernel/swsusp_32.S
+++ b/arch/powerpc/kernel/swsusp_32.S
@@ -5,7 +5,7 @@
#include <asm/thread_info.h>
#include <asm/ppc_asm.h>
#include <asm/asm-offsets.h>
-
+#include <asm/mmu.h>
/*
* Structure for storing CPU registers on the save area.
@@ -279,7 +279,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
mtibatl 3,r4
#endif
-BEGIN_FTR_SECTION
+BEGIN_MMU_FTR_SECTION
li r4,0
mtspr SPRN_DBAT4U,r4
mtspr SPRN_DBAT4L,r4
@@ -297,7 +297,7 @@ BEGIN_FTR_SECTION
mtspr SPRN_IBAT6L,r4
mtspr SPRN_IBAT7U,r4
mtspr SPRN_IBAT7L,r4
-END_FTR_SECTION_IFSET(CPU_FTR_HAS_HIGH_BATS)
+END_MMU_FTR_SECTION_IFSET(MMU_FTR_USE_HIGH_BATS)
/* Flush all TLBs */
lis r4,0x1000