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| author | Paul Mackerras <paulus@samba.org> | 2006-08-25 06:56:07 +0200 |
|---|---|---|
| committer | Paul Mackerras <paulus@samba.org> | 2006-08-25 06:56:07 +0200 |
| commit | ea0763a7e62f60f3e166327268a80f16ad806718 (patch) | |
| tree | de54ec5e5d5a49b3cba81b096b7572852aa6f5a9 /arch/powerpc/kernel/traps.c | |
| parent | [POWERPC] make checkstack work with ARCH=powerpc (diff) | |
| parent | [POWERPC] Use mpc8641hpcn PIC base address from dev tree. (diff) | |
| download | linux-ea0763a7e62f60f3e166327268a80f16ad806718.tar.xz linux-ea0763a7e62f60f3e166327268a80f16ad806718.zip | |
Merge branch 'merge'
Diffstat (limited to 'arch/powerpc/kernel/traps.c')
| -rw-r--r-- | arch/powerpc/kernel/traps.c | 24 |
1 files changed, 17 insertions, 7 deletions
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c index 2105767fcc57..4d0b4e74d579 100644 --- a/arch/powerpc/kernel/traps.c +++ b/arch/powerpc/kernel/traps.c @@ -55,9 +55,6 @@ #ifdef CONFIG_PPC64 /* XXX */ #define _IO_BASE pci_io_base -#ifdef CONFIG_KEXEC -cpumask_t cpus_in_sr = CPU_MASK_NONE; -#endif #endif #ifdef CONFIG_DEBUGGER @@ -211,6 +208,19 @@ void system_reset_exception(struct pt_regs *regs) die("System Reset", regs, SIGABRT); + /* + * Some CPUs when released from the debugger will execute this path. + * These CPUs entered the debugger via a soft-reset. If the CPU was + * hung before entering the debugger it will return to the hung + * state when exiting this function. This causes a problem in + * kdump since the hung CPU(s) will not respond to the IPI sent + * from kdump. To prevent the problem we call crash_kexec_secondary() + * here. If a kdump had not been initiated or we exit the debugger + * with the "exit and recover" command (x) crash_kexec_secondary() + * will return after 5ms and the CPU returns to its previous state. + */ + crash_kexec_secondary(regs); + /* Must die if the interrupt is not recoverable */ if (!(regs->msr & MSR_RI)) panic("Unrecoverable System Reset"); @@ -575,14 +585,14 @@ static void parse_fpe(struct pt_regs *regs) #define INST_MFSPR_PVR_MASK 0xfc1fffff #define INST_DCBA 0x7c0005ec -#define INST_DCBA_MASK 0x7c0007fe +#define INST_DCBA_MASK 0xfc0007fe #define INST_MCRXR 0x7c000400 -#define INST_MCRXR_MASK 0x7c0007fe +#define INST_MCRXR_MASK 0xfc0007fe #define INST_STRING 0x7c00042a -#define INST_STRING_MASK 0x7c0007fe -#define INST_STRING_GEN_MASK 0x7c00067e +#define INST_STRING_MASK 0xfc0007fe +#define INST_STRING_GEN_MASK 0xfc00067e #define INST_LSWI 0x7c0004aa #define INST_LSWX 0x7c00042a #define INST_STSWI 0x7c0005aa |