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| author | Nicholas Piggin <npiggin@gmail.com> | 2021-01-30 14:08:49 +0100 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2021-02-08 14:10:50 +0100 |
| commit | 118178e62e2e0da39b394e812fef7179c8bdb3bc (patch) | |
| tree | 033a3d38b86a4130ed4b2de59bf0d7cf1fc23337 /arch/powerpc/kernel/traps.c | |
| parent | powerpc/pseries/mce: restore msr before returning from handler (diff) | |
| download | linux-118178e62e2e0da39b394e812fef7179c8bdb3bc.tar.xz linux-118178e62e2e0da39b394e812fef7179c8bdb3bc.zip | |
powerpc: move NMI entry/exit code into wrapper
This moves the common NMI entry and exit code into the interrupt handler
wrappers.
This changes the behaviour of soft-NMI (watchdog) and HMI interrupts, and
also MCE interrupts on 64e, by adding missing parts of the NMI entry to
them.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20210130130852.2952424-40-npiggin@gmail.com
Diffstat (limited to 'arch/powerpc/kernel/traps.c')
| -rw-r--r-- | arch/powerpc/kernel/traps.c | 35 |
1 files changed, 6 insertions, 29 deletions
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c index 13fb93a59556..39c8b7e9b91a 100644 --- a/arch/powerpc/kernel/traps.c +++ b/arch/powerpc/kernel/traps.c @@ -435,11 +435,6 @@ DEFINE_INTERRUPT_HANDLER_NMI(system_reset_exception) { unsigned long hsrr0, hsrr1; bool saved_hsrrs = false; - u8 ftrace_enabled = this_cpu_get_ftrace_enabled(); - - this_cpu_set_ftrace_enabled(0); - - nmi_enter(); /* * System reset can interrupt code where HSRRs are live and MSR[RI]=1. @@ -514,10 +509,6 @@ out: mtspr(SPRN_HSRR1, hsrr1); } - nmi_exit(); - - this_cpu_set_ftrace_enabled(ftrace_enabled); - /* What should we do here? We could issue a shutdown or hard reset. */ return 0; @@ -809,6 +800,12 @@ void die_mce(const char *str, struct pt_regs *regs, long err) } NOKPROBE_SYMBOL(die_mce); +/* + * BOOK3S_64 does not call this handler as a non-maskable interrupt + * (it uses its own early real-mode handler to handle the MCE proper + * and then raises irq_work to call this handler when interrupts are + * enabled). + */ #ifdef CONFIG_PPC_BOOK3S_64 DEFINE_INTERRUPT_HANDLER_ASYNC(machine_check_exception) #else @@ -817,20 +814,6 @@ DEFINE_INTERRUPT_HANDLER_NMI(machine_check_exception) { int recover = 0; - /* - * BOOK3S_64 does not call this handler as a non-maskable interrupt - * (it uses its own early real-mode handler to handle the MCE proper - * and then raises irq_work to call this handler when interrupts are - * enabled). - * - * This is silly. The BOOK3S_64 should just call a different function - * rather than expecting semantics to magically change. Something - * like 'non_nmi_machine_check_exception()', perhaps? - */ - const bool nmi = !IS_ENABLED(CONFIG_PPC_BOOK3S_64); - - if (nmi) nmi_enter(); - __this_cpu_inc(irq_stat.mce_exceptions); add_taint(TAINT_MACHINE_CHECK, LOCKDEP_NOW_UNRELIABLE); @@ -862,8 +845,6 @@ bail: if (!(regs->msr & MSR_RI)) die_mce("Unrecoverable Machine check", regs, SIGBUS); - if (nmi) nmi_exit(); - #ifdef CONFIG_PPC_BOOK3S_64 return; #else @@ -1892,14 +1873,10 @@ DEFINE_INTERRUPT_HANDLER(vsx_unavailable_tm) DECLARE_INTERRUPT_HANDLER_NMI(performance_monitor_exception_nmi); DEFINE_INTERRUPT_HANDLER_NMI(performance_monitor_exception_nmi) { - nmi_enter(); - __this_cpu_inc(irq_stat.pmu_irqs); perf_irq(regs); - nmi_exit(); - return 0; } #endif |