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| author | Like Xu <likexu@tencent.com> | 2022-09-19 11:10:07 +0200 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2022-11-09 18:26:53 +0100 |
| commit | 4f1fa2a1bbeb2feca436d2c86bf6f78dc4e5e4c4 (patch) | |
| tree | 33694713af974b32bbabdc99abe94e39b64dfd65 /arch/powerpc/kernel/vdso | |
| parent | KVM: x86/pmu: Do not speculatively query Intel GP PMCs that don't exist yet (diff) | |
| download | linux-4f1fa2a1bbeb2feca436d2c86bf6f78dc4e5e4c4.tar.xz linux-4f1fa2a1bbeb2feca436d2c86bf6f78dc4e5e4c4.zip | |
KVM: x86/pmu: Limit the maximum number of supported Intel GP counters
The Intel Architectural IA32_PMCx MSRs addresses range allows for a
maximum of 8 GP counters, and KVM cannot address any more. Introduce a
local macro (named KVM_INTEL_PMC_MAX_GENERIC) and use it consistently to
refer to the number of counters supported by KVM, thus avoiding possible
out-of-bound accesses.
Suggested-by: Jim Mattson <jmattson@google.com>
Signed-off-by: Like Xu <likexu@tencent.com>
Reviewed-by: Jim Mattson <jmattson@google.com>
Message-Id: <20220919091008.60695-2-likexu@tencent.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'arch/powerpc/kernel/vdso')
0 files changed, 0 insertions, 0 deletions