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authorAneesh Kumar K.V <aneesh.kumar@linux.ibm.com>2020-07-01 09:22:34 +0200
committerMichael Ellerman <mpe@ellerman.id.au>2020-07-16 05:00:23 +0200
commit436499ab868f1a9e497cfdbf641affe8a122c571 (patch)
treee295aa82e16f6bfcc78670a9e90f932678cb5ec4 /arch/powerpc/lib/checksum_wrappers.c
parentpowerpc/pmem: Update ppc64 to use the new barrier instruction. (diff)
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powerpc/pmem: Avoid the barrier in flush routines
nvdimm expect the flush routines to just mark the cache clean. The barrier that mark the store globally visible is done in nvdimm_flush(). Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20200701072235.223558-7-aneesh.kumar@linux.ibm.com
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