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| author | Christophe Leroy <christophe.leroy@c-s.fr> | 2018-08-09 10:14:41 +0200 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2018-08-10 14:12:35 +0200 |
| commit | fa54a981ea7a852c145b05c95abba11e81fc1157 (patch) | |
| tree | cea88a64419bfe83d3e94e84cd154c0595278fa5 /arch/powerpc/lib | |
| parent | powerpc/pseries: Fix endianness while restoring of r3 in MCE handler. (diff) | |
| download | linux-fa54a981ea7a852c145b05c95abba11e81fc1157.tar.xz linux-fa54a981ea7a852c145b05c95abba11e81fc1157.zip | |
powerpc/lib: Use patch_site to patch copy_32 functions once cache is enabled
The symbol memcpy_nocache_branch defined in order to allow patching
of memset function once cache is enabled leads to confusing reports
by perf tool.
Using the new patch_site functionality solves this issue.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/lib')
| -rw-r--r-- | arch/powerpc/lib/copy_32.S | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/arch/powerpc/lib/copy_32.S b/arch/powerpc/lib/copy_32.S index da425bb6b369..ba66846fe973 100644 --- a/arch/powerpc/lib/copy_32.S +++ b/arch/powerpc/lib/copy_32.S @@ -13,6 +13,7 @@ #include <asm/errno.h> #include <asm/ppc_asm.h> #include <asm/export.h> +#include <asm/code-patching-asm.h> #define COPY_16_BYTES \ lwz r7,4(r4); \ @@ -107,8 +108,8 @@ _GLOBAL(memset) * Skip optimised bloc until cache is enabled. Will be replaced * by 'bne' during boot to use normal procedure if r4 is not zero */ -_GLOBAL(memset_nocache_branch) - b 2f +5: b 2f + patch_site 5b, patch__memset_nocache clrlwi r7,r6,32-LG_CACHELINE_BYTES add r8,r7,r5 @@ -168,7 +169,9 @@ _GLOBAL(memmove) /* fall through */ _GLOBAL(memcpy) - b generic_memcpy +1: b generic_memcpy + patch_site 1b, patch__memcpy_nocache + add r7,r3,r5 /* test if the src & dst overlap */ add r8,r4,r5 cmplw 0,r4,r7 |