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author | Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> | 2018-03-26 12:04:50 +0200 |
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committer | Michael Ellerman <mpe@ellerman.id.au> | 2018-03-30 15:10:39 +0200 |
commit | 872a100a49c3785b4577e002580ca5689d1be7a1 (patch) | |
tree | 4fe12a018c17f1b2e8917ee8b200ba8e0570c0b1 /arch/powerpc/mm/mem.c | |
parent | powerpc/mm/hash64: Increase the VA range (diff) | |
download | linux-872a100a49c3785b4577e002580ca5689d1be7a1.tar.xz linux-872a100a49c3785b4577e002580ca5689d1be7a1.zip |
powerpc/mm/hash: Don't memset pgd table if not needed
We need to zero-out pgd table only if we share the slab cache with
pud/pmd level caches. With the support of 4PB, we don't share the slab
cache anymore. Instead of removing the code completely hide it within
an #ifdef. We don't need to do this with any other page table level,
because they all allocate table of double the size and we take of
initializing the first half corrrectly during page table zap.
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
[mpe: Consolidate multiple #if / #ifdef into one]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/mm/mem.c')
0 files changed, 0 insertions, 0 deletions