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| author | Madhavan Srinivasan <maddy@linux.vnet.ibm.com> | 2018-12-09 10:18:15 +0100 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2018-12-20 10:53:11 +0100 |
| commit | 17cfccc91545682513541924245abb876d296063 (patch) | |
| tree | d942541766da64abd89a138e7b6089fa910ae9b1 /arch/powerpc/perf/isa207-common.c | |
| parent | powerpc/mm/hash: Handle user access of kernel address gracefully (diff) | |
| download | linux-17cfccc91545682513541924245abb876d296063.tar.xz linux-17cfccc91545682513541924245abb876d296063.zip | |
powerpc/perf: Fix thresholding counter data for unknown type
MMCRA[34:36] and MMCRA[38:44] expose the thresholding counter value.
Thresholding counter can be used to count latency cycles such as
load miss to reload. But threshold counter value is not relevant
when the sampled instruction type is unknown or reserved. Patch to
fix the thresholding counter value to zero when sampled instruction
type is unknown or reserved.
Fixes: 170a315f41c6('powerpc/perf: Support to export MMCRA[TEC*] field to userspace')
Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/perf/isa207-common.c')
| -rw-r--r-- | arch/powerpc/perf/isa207-common.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/arch/powerpc/perf/isa207-common.c b/arch/powerpc/perf/isa207-common.c index 177de814286f..6a2f65d3d088 100644 --- a/arch/powerpc/perf/isa207-common.c +++ b/arch/powerpc/perf/isa207-common.c @@ -226,8 +226,13 @@ void isa207_get_mem_weight(u64 *weight) u64 mmcra = mfspr(SPRN_MMCRA); u64 exp = MMCRA_THR_CTR_EXP(mmcra); u64 mantissa = MMCRA_THR_CTR_MANT(mmcra); + u64 sier = mfspr(SPRN_SIER); + u64 val = (sier & ISA207_SIER_TYPE_MASK) >> ISA207_SIER_TYPE_SHIFT; - *weight = mantissa << (2 * exp); + if (val == 0 || val == 7) + *weight = 0; + else + *weight = mantissa << (2 * exp); } int isa207_get_constraint(u64 event, unsigned long *maskp, unsigned long *valp) |