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| author | Ilie Halip <ilie.halip@gmail.com> | 2019-09-20 17:39:51 +0200 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2020-03-17 13:40:36 +0100 |
| commit | 9451c79bc39e610882bdd12370f01af5004a3c4f (patch) | |
| tree | 4846790ac3209aa89d2106ad6f694ba50b48546f /arch/powerpc/platforms/powermac | |
| parent | powerpc/fsl_booke: Avoid creating duplicate tlb1 entry (diff) | |
| download | linux-9451c79bc39e610882bdd12370f01af5004a3c4f.tar.xz linux-9451c79bc39e610882bdd12370f01af5004a3c4f.zip | |
powerpc/pmac/smp: Avoid unused-variable warnings
When building with ppc64_defconfig, the compiler reports
that these 2 variables are not used:
warning: unused variable 'core99_l2_cache' [-Wunused-variable]
warning: unused variable 'core99_l3_cache' [-Wunused-variable]
They are only used when CONFIG_PPC64 is not defined. Move
them into a section which does the same macro check.
Reported-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Ilie Halip <ilie.halip@gmail.com>
[mpe: Move them into core99_init_caches() which is their only user]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20190920153951.25762-1-ilie.halip@gmail.com
Diffstat (limited to 'arch/powerpc/platforms/powermac')
| -rw-r--r-- | arch/powerpc/platforms/powermac/smp.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/powerpc/platforms/powermac/smp.c b/arch/powerpc/platforms/powermac/smp.c index f95fbdee6efe..4a2a1b2529b3 100644 --- a/arch/powerpc/platforms/powermac/smp.c +++ b/arch/powerpc/platforms/powermac/smp.c @@ -660,13 +660,13 @@ static void smp_core99_gpio_tb_freeze(int freeze) #endif /* !CONFIG_PPC64 */ -/* L2 and L3 cache settings to pass from CPU0 to CPU1 on G4 cpus */ -volatile static long int core99_l2_cache; -volatile static long int core99_l3_cache; - static void core99_init_caches(int cpu) { #ifndef CONFIG_PPC64 + /* L2 and L3 cache settings to pass from CPU0 to CPU1 on G4 cpus */ + volatile static long int core99_l2_cache; + volatile static long int core99_l3_cache; + if (!cpu_has_feature(CPU_FTR_L2CR)) return; |