summaryrefslogtreecommitdiffstats
path: root/arch/powerpc/platforms/powernv/pci.h
diff options
context:
space:
mode:
authorOliver O'Halloran <oohall@gmail.com>2020-04-06 05:07:45 +0200
committerMichael Ellerman <mpe@ellerman.id.au>2020-05-28 15:24:38 +0200
commit03b7bf341c18ff19129cc2825b62bb0e212463f1 (patch)
tree37f763a29875287ee52087608e174277dcf8d21b /arch/powerpc/platforms/powernv/pci.h
parentpowerpc/powernv/pci: Move tce size parsing to pci-ioda-tce.c (diff)
downloadlinux-03b7bf341c18ff19129cc2825b62bb0e212463f1.tar.xz
linux-03b7bf341c18ff19129cc2825b62bb0e212463f1.zip
powerpc/powernv/npu: Move IOMMU group setup into npu-dma.c
The NVlink IOMMU group setup is only relevant to NVLink devices so move it into the NPU containment zone. This let us remove some prototypes in pci.h and staticfy some function definitions. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20200406030745.24595-8-oohall@gmail.com
Diffstat (limited to 'arch/powerpc/platforms/powernv/pci.h')
-rw-r--r--arch/powerpc/platforms/powernv/pci.h6
1 files changed, 1 insertions, 5 deletions
diff --git a/arch/powerpc/platforms/powernv/pci.h b/arch/powerpc/platforms/powernv/pci.h
index 0c5845a1f05d..20941ef2706e 100644
--- a/arch/powerpc/platforms/powernv/pci.h
+++ b/arch/powerpc/platforms/powernv/pci.h
@@ -209,11 +209,7 @@ extern void pe_level_printk(const struct pnv_ioda_pe *pe, const char *level,
/* Nvlink functions */
extern void pnv_npu_try_dma_set_bypass(struct pci_dev *gpdev, bool bypass);
extern void pnv_pci_ioda2_tce_invalidate_entire(struct pnv_phb *phb, bool rm);
-extern struct pnv_ioda_pe *pnv_pci_npu_setup_iommu(struct pnv_ioda_pe *npe);
-extern struct iommu_table_group *pnv_try_setup_npu_table_group(
- struct pnv_ioda_pe *pe);
-extern struct iommu_table_group *pnv_npu_compound_attach(
- struct pnv_ioda_pe *pe);
+extern void pnv_pci_npu_setup_iommu_groups(void);
/* pci-ioda-tce.c */
#define POWERNV_IOMMU_DEFAULT_LEVELS 2