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author | Christophe Leroy <christophe.leroy@csgroup.eu> | 2020-05-19 07:49:26 +0200 |
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committer | Michael Ellerman <mpe@ellerman.id.au> | 2020-05-26 14:22:23 +0200 |
commit | fcdafd10a363cf3278ce29c6c9a92930380c6cd8 (patch) | |
tree | 09bd40daaf027069f0fc1ee5202bd22dd81865aa /arch/powerpc/platforms | |
parent | powerpc/8xx: Allow STRICT_KERNEL_RwX with pinned TLB (diff) | |
download | linux-fcdafd10a363cf3278ce29c6c9a92930380c6cd8.tar.xz linux-fcdafd10a363cf3278ce29c6c9a92930380c6cd8.zip |
powerpc/8xx: Allow large TLBs with DEBUG_PAGEALLOC
DEBUG_PAGEALLOC only manages RW data.
Text and RO data can still be mapped with hugepages and pinned TLB.
In order to map with hugepages, also enforce a 512kB data alignment
minimum. That's a trade-off between size of speed, taking into
account that DEBUG_PAGEALLOC is a debug option. Anyway the alignment
is still tunable.
We also allow tuning of alignment for book3s to limit the complexity
of the test in Kconfig that will anyway disappear in the following
patches once DEBUG_PAGEALLOC is handled together with BATs.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/c13256f2d356a316715da61fe089b3623ef217a5.1589866984.git.christophe.leroy@csgroup.eu
Diffstat (limited to 'arch/powerpc/platforms')
-rw-r--r-- | arch/powerpc/platforms/8xx/Kconfig | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/platforms/8xx/Kconfig b/arch/powerpc/platforms/8xx/Kconfig index 05669f2fadce..abb2b45b2789 100644 --- a/arch/powerpc/platforms/8xx/Kconfig +++ b/arch/powerpc/platforms/8xx/Kconfig @@ -167,7 +167,7 @@ menu "8xx advanced setup" config PIN_TLB bool "Pinned Kernel TLBs" - depends on ADVANCED_OPTIONS && !DEBUG_PAGEALLOC + depends on ADVANCED_OPTIONS help On the 8xx, we have 32 instruction TLBs and 32 data TLBs. In each table 4 TLBs can be pinned. |