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| author | Gavin Shan <shangw@linux.vnet.ibm.com> | 2013-04-25 21:20:59 +0200 |
|---|---|---|
| committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2013-04-26 08:09:59 +0200 |
| commit | 137436c9a6ee385c883db09e41af763888ee7642 (patch) | |
| tree | 251fb4b23142e8dc05a5824359ba73e383b0434d /arch/powerpc/sysdev | |
| parent | powerpc/powernv: Add option CONFIG_POWERNV_MSI (diff) | |
| download | linux-137436c9a6ee385c883db09e41af763888ee7642.tar.xz linux-137436c9a6ee385c883db09e41af763888ee7642.zip | |
powerpc/powernv: Patch MSI EOI handler on P8
The EOI handler of MSI/MSI-X interrupts for P8 (PHB3) need additional
steps to handle the P/Q bits in IVE before EOIing the corresponding
interrupt. The patch changes the EOI handler to cover that. we have
individual IRQ chip in each PHB instance. During the MSI IRQ setup
time, the IRQ chip is copied over from the original one for that IRQ,
and the EOI handler is patched with the one that will handle the P/Q
bits (As Ben suggested).
Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/sysdev')
| -rw-r--r-- | arch/powerpc/sysdev/xics/icp-native.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/sysdev/xics/icp-native.c b/arch/powerpc/sysdev/xics/icp-native.c index 48861d3fcd07..89db29d17c25 100644 --- a/arch/powerpc/sysdev/xics/icp-native.c +++ b/arch/powerpc/sysdev/xics/icp-native.c @@ -81,7 +81,7 @@ static void icp_native_set_cpu_priority(unsigned char cppr) iosync(); } -static void icp_native_eoi(struct irq_data *d) +void icp_native_eoi(struct irq_data *d) { unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d); |