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| author | Alexander Graf <agraf@suse.de> | 2010-03-24 21:48:24 +0100 |
|---|---|---|
| committer | Avi Kivity <avi@redhat.com> | 2010-05-17 11:17:01 +0200 |
| commit | c664876c6d88ff8c8e93ee05c0bbdc3e4c2af488 (patch) | |
| tree | d478322acafbae0971e7f0dd0cab31ed7299c463 /arch/powerpc | |
| parent | KVM: PPC: Load VCPU for register fetching (diff) | |
| download | linux-c664876c6d88ff8c8e93ee05c0bbdc3e4c2af488.tar.xz linux-c664876c6d88ff8c8e93ee05c0bbdc3e4c2af488.zip | |
KVM: PPC: Implement mfsr emulation
We emulate the mfsrin instruction already, that passes the SR number
in a register value. But we lacked support for mfsr that encoded the
SR number in the opcode.
So let's implement it.
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Avi Kivity <avi@redhat.com>
Diffstat (limited to 'arch/powerpc')
| -rw-r--r-- | arch/powerpc/kvm/book3s_64_emulate.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/powerpc/kvm/book3s_64_emulate.c b/arch/powerpc/kvm/book3s_64_emulate.c index c9892140dd02..8d7a78d87eff 100644 --- a/arch/powerpc/kvm/book3s_64_emulate.c +++ b/arch/powerpc/kvm/book3s_64_emulate.c @@ -35,6 +35,7 @@ #define OP_31_XOP_SLBMTE 402 #define OP_31_XOP_SLBIE 434 #define OP_31_XOP_SLBIA 498 +#define OP_31_XOP_MFSR 595 #define OP_31_XOP_MFSRIN 659 #define OP_31_XOP_SLBMFEV 851 #define OP_31_XOP_EIOIO 854 @@ -90,6 +91,18 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu, case OP_31_XOP_MTMSR: kvmppc_set_msr(vcpu, kvmppc_get_gpr(vcpu, get_rs(inst))); break; + case OP_31_XOP_MFSR: + { + int srnum; + + srnum = kvmppc_get_field(inst, 12 + 32, 15 + 32); + if (vcpu->arch.mmu.mfsrin) { + u32 sr; + sr = vcpu->arch.mmu.mfsrin(vcpu, srnum); + kvmppc_set_gpr(vcpu, get_rt(inst), sr); + } + break; + } case OP_31_XOP_MFSRIN: { int srnum; |