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authorChen-Hui Zhao <chenhui.zhao@freescale.com>2013-04-03 15:09:09 +0200
committerKumar Gala <galak@kernel.crashing.org>2013-04-03 18:43:02 +0200
commitddb487dca347956ed3bedda1f5a00ab62d05ebff (patch)
treef14e52ea98ceb13278e05b0e57865545f32d189d /arch/powerpc
parentpowerpc/fsl-msi: use a different lockclass for the cascade interrupt (diff)
downloadlinux-ddb487dca347956ed3bedda1f5a00ab62d05ebff.tar.xz
linux-ddb487dca347956ed3bedda1f5a00ab62d05ebff.zip
powerpc/85xx: fix a bug with the parameter of mpic_reset_core()
mpic_reset_core() need a logical cpu number instead of physical. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/platforms/85xx/smp.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/platforms/85xx/smp.c b/arch/powerpc/platforms/85xx/smp.c
index 148c2f2d9780..6a1759939c6b 100644
--- a/arch/powerpc/platforms/85xx/smp.c
+++ b/arch/powerpc/platforms/85xx/smp.c
@@ -201,7 +201,7 @@ static int __cpuinit smp_85xx_kick_cpu(int nr)
* We don't set the BPTR register here since it already points
* to the boot page properly.
*/
- mpic_reset_core(hw_cpu);
+ mpic_reset_core(nr);
/*
* wait until core is ready...