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authorBharat Bhushan <r65777@freescale.com>2012-03-05 02:34:08 +0100
committerAvi Kivity <avi@redhat.com>2012-04-08 13:01:31 +0200
commitc0fe7b099931c6c05c98a05c277185ee25254f35 (patch)
treed842f7b3f6f8f94780f8c4bc4f6d5dc20e4f7aea /arch/powerpc
parentKVM: PPC: Book3S HV: Report stolen time to guest through dispatch trace log (diff)
downloadlinux-c0fe7b099931c6c05c98a05c277185ee25254f35.tar.xz
linux-c0fe7b099931c6c05c98a05c277185ee25254f35.zip
Restore guest CR after exit timing calculation
No instruction which can change Condition Register (CR) should be executed after Guest CR is loaded. So the guest CR is restored after the Exit Timing in lightweight_exit executes cmpw, which can clobber CR. Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Avi Kivity <avi@redhat.com>
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/kvm/bookehv_interrupts.S11
1 files changed, 8 insertions, 3 deletions
diff --git a/arch/powerpc/kvm/bookehv_interrupts.S b/arch/powerpc/kvm/bookehv_interrupts.S
index 57e2fa414444..909e96e0650c 100644
--- a/arch/powerpc/kvm/bookehv_interrupts.S
+++ b/arch/powerpc/kvm/bookehv_interrupts.S
@@ -580,7 +580,6 @@ lightweight_exit:
mtlr r3
mtxer r5
mtctr r6
- mtcr r7
mtsrr0 r8
mtsrr1 r9
@@ -588,14 +587,20 @@ lightweight_exit:
/* save enter time */
1:
mfspr r6, SPRN_TBRU
- mfspr r7, SPRN_TBRL
+ mfspr r9, SPRN_TBRL
mfspr r8, SPRN_TBRU
cmpw r8, r6
- PPC_STL r7, VCPU_TIMING_LAST_ENTER_TBL(r4)
+ PPC_STL r9, VCPU_TIMING_LAST_ENTER_TBL(r4)
bne 1b
PPC_STL r8, VCPU_TIMING_LAST_ENTER_TBU(r4)
#endif
+ /*
+ * Don't execute any instruction which can change CR after
+ * below instruction.
+ */
+ mtcr r7
+
/* Finish loading guest volatiles and jump to guest. */
PPC_LL r5, VCPU_GPR(r5)(r4)
PPC_LL r6, VCPU_GPR(r6)(r4)