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| author | Michael Ellerman <mpe@ellerman.id.au> | 2023-02-16 12:29:15 +0100 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2023-02-16 13:53:15 +0100 |
| commit | a7caf3f181f160ae13ece0124e1c268d22263708 (patch) | |
| tree | eea3335f1f3538f8d8f361314362aa89b03bb184 /arch/powerpc | |
| parent | powerpc/nohash: Fix build error with binutils >= 2.38 (diff) | |
| download | linux-a7caf3f181f160ae13ece0124e1c268d22263708.tar.xz linux-a7caf3f181f160ae13ece0124e1c268d22263708.zip | |
powerpc/nohash: Fix build with llvm-as
When using the LLVM integrated assembler (llvm-as), the book3e build
fails with:
arch/powerpc/mm/nohash/tlb_low_64e.S:354:2: error: invalid instruction
tlbilxva 0,%r15
^
tlbilxva is an extended mnemonic for tlbilx, but llvm-as also doesn't
support tlbilx, despite it being an e500mc instruction.
Fix it by using the existing PPC_TLBILX_VA macro. The resulting binary
is identical when building with binutils.
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20230216112915.1681631-1-mpe@ellerman.id.au
Diffstat (limited to 'arch/powerpc')
| -rw-r--r-- | arch/powerpc/mm/nohash/tlb_low_64e.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/mm/nohash/tlb_low_64e.S b/arch/powerpc/mm/nohash/tlb_low_64e.S index 76cf456d7976..7e0b8fe1c279 100644 --- a/arch/powerpc/mm/nohash/tlb_low_64e.S +++ b/arch/powerpc/mm/nohash/tlb_low_64e.S @@ -351,7 +351,7 @@ END_FTR_SECTION_NESTED(CPU_FTR_EMB_HV,CPU_FTR_EMB_HV,532) mfspr r15,SPRN_MAS2 isync - tlbilxva 0,r15 + PPC_TLBILX_VA(0,R15) isync mtspr SPRN_MAS6,r10 |