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authorMichael Neuling <mikey@neuling.org>2006-08-09 09:00:30 +0200
committerPaul Mackerras <paulus@samba.org>2006-08-25 05:17:08 +0200
commit11a27ad782fc7ae4b7d6ac8fefad4ceb415300d6 (patch)
tree10e3f8925e8b659a833017ceb674edbbe2fd3c82 /arch/powerpc
parentMerge branch 'merge' (diff)
downloadlinux-11a27ad782fc7ae4b7d6ac8fefad4ceb415300d6.tar.xz
linux-11a27ad782fc7ae4b7d6ac8fefad4ceb415300d6.zip
[POWERPC] SLB shadow buffer cleanup
Cleanup some of the #define magic as suggested by Milton. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/kernel/asm-offsets.c5
-rw-r--r--arch/powerpc/kernel/entry_64.S13
2 files changed, 9 insertions, 9 deletions
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index 2ef7ea860379..a2f95e467a75 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -42,6 +42,7 @@
#include <asm/lppaca.h>
#include <asm/cache.h>
#include <asm/compat.h>
+#include <asm/mmu.h>
#endif
#define DEFINE(sym, val) \
@@ -137,6 +138,10 @@ int main(void)
DEFINE(PACA_SYSTEM_TIME, offsetof(struct paca_struct, system_time));
DEFINE(PACA_SLBSHADOWPTR, offsetof(struct paca_struct, slb_shadow_ptr));
+ DEFINE(SLBSHADOW_STACKVSID,
+ offsetof(struct slb_shadow, save_area[SLB_NUM_BOLTED - 1].vsid));
+ DEFINE(SLBSHADOW_STACKESID,
+ offsetof(struct slb_shadow, save_area[SLB_NUM_BOLTED - 1].esid));
DEFINE(LPPACASRR0, offsetof(struct lppaca, saved_srr0));
DEFINE(LPPACASRR1, offsetof(struct lppaca, saved_srr1));
DEFINE(LPPACAANYINT, offsetof(struct lppaca, int_dword.any_int));
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 5baea498ea64..2cd872b5283b 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -323,11 +323,6 @@ _GLOBAL(ret_from_fork)
* The code which creates the new task context is in 'copy_thread'
* in arch/powerpc/kernel/process.c
*/
-#define SHADOW_SLB_BOLTED_STACK_ESID \
- (SLBSHADOW_SAVEAREA + 0x10*(SLB_NUM_BOLTED-1))
-#define SHADOW_SLB_BOLTED_STACK_VSID \
- (SLBSHADOW_SAVEAREA + 0x10*(SLB_NUM_BOLTED-1) + 8)
-
.align 7
_GLOBAL(_switch)
mflr r0
@@ -383,10 +378,10 @@ BEGIN_FTR_SECTION
/* Update the last bolted SLB */
ld r9,PACA_SLBSHADOWPTR(r13)
- li r12,0
- std r12,SHADOW_SLB_BOLTED_STACK_ESID(r9) /* Clear ESID */
- std r7,SHADOW_SLB_BOLTED_STACK_VSID(r9) /* Save VSID */
- std r0,SHADOW_SLB_BOLTED_STACK_ESID(r9) /* Save ESID */
+ li r12,0
+ std r12,SLBSHADOW_STACKESID(r9) /* Clear ESID */
+ std r7,SLBSHADOW_STACKVSID(r9) /* Save VSID */
+ std r0,SLBSHADOW_STACKESID(r9) /* Save ESID */
slbie r6
slbie r6 /* Workaround POWER5 < DD2.1 issue */