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authorKumar Gala <galak@freescale.com>2005-05-23 19:29:56 +0200
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-05-23 19:58:31 +0200
commite16fa6b9d2ad9467cf5bdf517e6b6f45e5867ad6 (patch)
tree0bf32353105286a5624aeea862d35a4bbae09851 /arch/ppc/syslib
parent[PATCH] ppc64: Fix booting on latest G5 models (diff)
downloadlinux-e16fa6b9d2ad9467cf5bdf517e6b6f45e5867ad6.tar.xz
linux-e16fa6b9d2ad9467cf5bdf517e6b6f45e5867ad6.zip
[PATCH] ppc32: Fix an off-by-one error in ipic_init
There is an off-by-one error in the IPIC code that configures the external interrupts (Edge or Level Sensitive). Signed-off-by: Randy Vinson <rvinson@mvista.com> Signed-off-by: Kumar Gala <kumar.gala@freescale.com> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/ppc/syslib')
-rw-r--r--arch/ppc/syslib/ipic.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/ppc/syslib/ipic.c b/arch/ppc/syslib/ipic.c
index acb2cde3171f..580ed658e872 100644
--- a/arch/ppc/syslib/ipic.c
+++ b/arch/ppc/syslib/ipic.c
@@ -479,7 +479,7 @@ void __init ipic_init(phys_addr_t phys_addr,
temp = 0;
for (i = 0 ; i < senses_count ; i++) {
if ((senses[i] & IRQ_SENSE_MASK) == IRQ_SENSE_EDGE) {
- temp |= 1 << (16 - i);
+ temp |= 1 << (15 - i);
if (i != 0)
irq_desc[i + irq_offset + MPC83xx_IRQ_EXT1 - 1].status = 0;
else