[PATCH] powerpc: Rename BPA to Cell

The official name for BPA is now CBEA (Cell Broadband
Engine Architecture). This patch renames all occurences
of the term BPA to 'Cell' for easier recognition.

Signed-off-by: Arnd Bergmann <arndb@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>

11 files changed, 94 insertions, 94 deletions

diff --git a/arch/ppc64/kernel/Makefile b/arch/ppc64/kernel/Makefile
index 327c08ce4291..a01a9de9eb56 100644
--- a/arch/ppc64/kernel/Makefile
+++ b/arch/ppc64/kernel/Makefile
@@ -31,7 +31,7 @@ endif
 
 obj-$(CONFIG_PPC_PSERIES) += rtasd.o udbg_16550.o
 
-obj-$(CONFIG_PPC_BPA) += bpa_setup.o bpa_iommu.o bpa_nvram.o \
+obj-$(CONFIG_PPC_CELL) += bpa_setup.o bpa_iommu.o bpa_nvram.o \
 			 bpa_iic.o spider-pic.o
 
 obj-$(CONFIG_KEXEC)		+= machine_kexec.o
diff --git a/arch/ppc64/kernel/bpa_iic.c b/arch/ppc64/kernel/bpa_iic.c
index 0aaa878e19d3..7fbe78a9327d 100644
--- a/arch/ppc64/kernel/bpa_iic.c
+++ b/arch/ppc64/kernel/bpa_iic.c
@@ -1,5 +1,5 @@
 /*
- * BPA Internal Interrupt Controller
+ * Cell Internal Interrupt Controller
  *
  * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
  *
@@ -31,7 +31,7 @@
 #include <asm/prom.h>
 #include <asm/ptrace.h>
 
-#include "bpa_iic.h"
+#include "interrupt.h"
 
 struct iic_pending_bits {
 	u32 data;
@@ -89,7 +89,7 @@ static void iic_end(unsigned int irq)
 }
 
 static struct hw_interrupt_type iic_pic = {
-	.typename = " BPA-IIC  ",
+	.typename = " CELL-IIC ",
 	.startup = iic_startup,
 	.enable = iic_enable,
 	.disable = iic_disable,
@@ -106,7 +106,7 @@ static int iic_external_get_irq(struct iic_pending_bits pending)
 	irq = -1;
 
 	/*
-	 * This mapping is specific to the Broadband
+	 * This mapping is specific to the Cell Broadband
 	 * Engine. We might need to get the numbers
 	 * from the device tree to support future CPUs.
 	 */
diff --git a/arch/ppc64/kernel/bpa_iic.h b/arch/ppc64/kernel/bpa_iic.h
index 6833c3022166..37d58e6fd0c6 100644
--- a/arch/ppc64/kernel/bpa_iic.h
+++ b/arch/ppc64/kernel/bpa_iic.h
@@ -1,5 +1,5 @@
-#ifndef ASM_BPA_IIC_H
-#define ASM_BPA_IIC_H
+#ifndef ASM_CELL_PIC_H
+#define ASM_CELL_PIC_H
 #ifdef __KERNEL__
 /*
  * Mapping of IIC pending bits into per-node
@@ -21,7 +21,7 @@
  *    + node number
  *    * don't care
  *
- * A node consists of a Broadband Engine and an optional
+ * A node consists of a Cell Broadband Engine and an optional
  * south bridge device providing a maximum of 64 IRQs.
  * The south bridge may be connected to either IOIF0
  * or IOIF1.
@@ -59,4 +59,4 @@ extern void spider_init_IRQ(void);
 extern int spider_get_irq(unsigned long int_pending);
 
 #endif
-#endif /* ASM_BPA_IIC_H */
+#endif /* ASM_CELL_PIC_H */
diff --git a/arch/ppc64/kernel/bpa_iommu.c b/arch/ppc64/kernel/bpa_iommu.c
index da1b4b7a3269..74f999b4ac9e 100644
--- a/arch/ppc64/kernel/bpa_iommu.c
+++ b/arch/ppc64/kernel/bpa_iommu.c
@@ -1,5 +1,5 @@
 /*
- * IOMMU implementation for Broadband Processor Architecture
+ * IOMMU implementation for Cell Broadband Processor Architecture
  * We just establish a linear mapping at boot by setting all the
  * IOPT cache entries in the CPU.
  * The mapping functions should be identical to pci_direct_iommu, 
@@ -41,7 +41,7 @@
 #include <asm/system.h>
 #include <asm/ppc-pci.h>
 
-#include "bpa_iommu.h"
+#include "iommu.h"
 
 static inline unsigned long 
 get_iopt_entry(unsigned long real_address, unsigned long ioid,
@@ -276,7 +276,7 @@ static void iommu_dev_setup_null(struct pci_dev *d) { }
  * for each DMA window used by any device. For now, we
  * happen to know that there is only one DMA window in use,
  * starting at iopt_phys_offset. */
-static void bpa_map_iommu(void)
+static void cell_map_iommu(void)
 {
 	unsigned long address;
 	void __iomem *base;
@@ -309,7 +309,7 @@ static void bpa_map_iommu(void)
 }
 
 
-static void *bpa_alloc_coherent(struct device *hwdev, size_t size,
+static void *cell_alloc_coherent(struct device *hwdev, size_t size,
 			   dma_addr_t *dma_handle, gfp_t flag)
 {
 	void *ret;
@@ -317,65 +317,65 @@ static void *bpa_alloc_coherent(struct device *hwdev, size_t size,
 	ret = (void *)__get_free_pages(flag, get_order(size));
 	if (ret != NULL) {
 		memset(ret, 0, size);
-		*dma_handle = virt_to_abs(ret) | BPA_DMA_VALID;
+		*dma_handle = virt_to_abs(ret) | CELL_DMA_VALID;
 	}
 	return ret;
 }
 
-static void bpa_free_coherent(struct device *hwdev, size_t size,
+static void cell_free_coherent(struct device *hwdev, size_t size,
 				 void *vaddr, dma_addr_t dma_handle)
 {
 	free_pages((unsigned long)vaddr, get_order(size));
 }
 
-static dma_addr_t bpa_map_single(struct device *hwdev, void *ptr,
+static dma_addr_t cell_map_single(struct device *hwdev, void *ptr,
 		size_t size, enum dma_data_direction direction)
 {
-	return virt_to_abs(ptr) | BPA_DMA_VALID;
+	return virt_to_abs(ptr) | CELL_DMA_VALID;
 }
 
-static void bpa_unmap_single(struct device *hwdev, dma_addr_t dma_addr,
+static void cell_unmap_single(struct device *hwdev, dma_addr_t dma_addr,
 		size_t size, enum dma_data_direction direction)
 {
 }
 
-static int bpa_map_sg(struct device *hwdev, struct scatterlist *sg,
+static int cell_map_sg(struct device *hwdev, struct scatterlist *sg,
 		int nents, enum dma_data_direction direction)
 {
 	int i;
 
 	for (i = 0; i < nents; i++, sg++) {
 		sg->dma_address = (page_to_phys(sg->page) + sg->offset)
-					| BPA_DMA_VALID;
+					| CELL_DMA_VALID;
 		sg->dma_length = sg->length;
 	}
 
 	return nents;
 }
 
-static void bpa_unmap_sg(struct device *hwdev, struct scatterlist *sg,
+static void cell_unmap_sg(struct device *hwdev, struct scatterlist *sg,
 		int nents, enum dma_data_direction direction)
 {
 }
 
-static int bpa_dma_supported(struct device *dev, u64 mask)
+static int cell_dma_supported(struct device *dev, u64 mask)
 {
 	return mask < 0x100000000ull;
 }
 
-void bpa_init_iommu(void)
+void cell_init_iommu(void)
 {
-	bpa_map_iommu();
+	cell_map_iommu();
 
 	/* Direct I/O, IOMMU off */
 	ppc_md.iommu_dev_setup = iommu_dev_setup_null;
 	ppc_md.iommu_bus_setup = iommu_bus_setup_null;
 
-	pci_dma_ops.alloc_coherent = bpa_alloc_coherent;
-	pci_dma_ops.free_coherent = bpa_free_coherent;
-	pci_dma_ops.map_single = bpa_map_single;
-	pci_dma_ops.unmap_single = bpa_unmap_single;
-	pci_dma_ops.map_sg = bpa_map_sg;
-	pci_dma_ops.unmap_sg = bpa_unmap_sg;
-	pci_dma_ops.dma_supported = bpa_dma_supported;
+	pci_dma_ops.alloc_coherent = cell_alloc_coherent;
+	pci_dma_ops.free_coherent = cell_free_coherent;
+	pci_dma_ops.map_single = cell_map_single;
+	pci_dma_ops.unmap_single = cell_unmap_single;
+	pci_dma_ops.map_sg = cell_map_sg;
+	pci_dma_ops.unmap_sg = cell_unmap_sg;
+	pci_dma_ops.dma_supported = cell_dma_supported;
 }
diff --git a/arch/ppc64/kernel/bpa_iommu.h b/arch/ppc64/kernel/bpa_iommu.h
index e547d77dfa04..490d77abfe85 100644
--- a/arch/ppc64/kernel/bpa_iommu.h
+++ b/arch/ppc64/kernel/bpa_iommu.h
@@ -1,5 +1,5 @@
-#ifndef BPA_IOMMU_H
-#define BPA_IOMMU_H
+#ifndef CELL_IOMMU_H
+#define CELL_IOMMU_H
 
 /* some constants */
 enum {
@@ -55,11 +55,11 @@ enum {
 
 	/* The high bit needs to be set on every DMA address,
 	   only 2GB are addressable */
-	BPA_DMA_VALID	  = 0x80000000,
-	BPA_DMA_MASK	  = 0x7fffffff,
+	CELL_DMA_VALID	  = 0x80000000,
+	CELL_DMA_MASK	  = 0x7fffffff,
 };
 
 
-void bpa_init_iommu(void);
+void cell_init_iommu(void);
 
 #endif
diff --git a/arch/ppc64/kernel/bpa_nvram.c b/arch/ppc64/kernel/bpa_nvram.c
index 06a119cfceb5..74e0d31a3559 100644
--- a/arch/ppc64/kernel/bpa_nvram.c
+++ b/arch/ppc64/kernel/bpa_nvram.c
@@ -1,5 +1,5 @@
 /*
- * NVRAM for CPBW
+ * memory mapped NVRAM
  *
  * (C) Copyright IBM Corp. 2005
  *
@@ -30,54 +30,54 @@
 #include <asm/nvram.h>
 #include <asm/prom.h>
 
-static void __iomem *bpa_nvram_start;
-static long bpa_nvram_len;
-static spinlock_t bpa_nvram_lock = SPIN_LOCK_UNLOCKED;
+static void __iomem *mmio_nvram_start;
+static long mmio_nvram_len;
+static spinlock_t mmio_nvram_lock = SPIN_LOCK_UNLOCKED;
 
-static ssize_t bpa_nvram_read(char *buf, size_t count, loff_t *index)
+static ssize_t mmio_nvram_read(char *buf, size_t count, loff_t *index)
 {
 	unsigned long flags;
 
-	if (*index >= bpa_nvram_len)
+	if (*index >= mmio_nvram_len)
 		return 0;
-	if (*index + count > bpa_nvram_len)
-		count = bpa_nvram_len - *index;
+	if (*index + count > mmio_nvram_len)
+		count = mmio_nvram_len - *index;
 
-	spin_lock_irqsave(&bpa_nvram_lock, flags);
+	spin_lock_irqsave(&mmio_nvram_lock, flags);
 
-	memcpy_fromio(buf, bpa_nvram_start + *index, count);
+	memcpy_fromio(buf, mmio_nvram_start + *index, count);
 
-	spin_unlock_irqrestore(&bpa_nvram_lock, flags);
+	spin_unlock_irqrestore(&mmio_nvram_lock, flags);
 	
 	*index += count;
 	return count;
 }
 
-static ssize_t bpa_nvram_write(char *buf, size_t count, loff_t *index)
+static ssize_t mmio_nvram_write(char *buf, size_t count, loff_t *index)
 {
 	unsigned long flags;
 
-	if (*index >= bpa_nvram_len)
+	if (*index >= mmio_nvram_len)
 		return 0;
-	if (*index + count > bpa_nvram_len)
-		count = bpa_nvram_len - *index;
+	if (*index + count > mmio_nvram_len)
+		count = mmio_nvram_len - *index;
 
-	spin_lock_irqsave(&bpa_nvram_lock, flags);
+	spin_lock_irqsave(&mmio_nvram_lock, flags);
 
-	memcpy_toio(bpa_nvram_start + *index, buf, count);
+	memcpy_toio(mmio_nvram_start + *index, buf, count);
 
-	spin_unlock_irqrestore(&bpa_nvram_lock, flags);
+	spin_unlock_irqrestore(&mmio_nvram_lock, flags);
 	
 	*index += count;
 	return count;
 }
 
-static ssize_t bpa_nvram_get_size(void)
+static ssize_t mmio_nvram_get_size(void)
 {
-	return bpa_nvram_len;
+	return mmio_nvram_len;
 }
 
-int __init bpa_nvram_init(void)
+int __init mmio_nvram_init(void)
 {
 	struct device_node *nvram_node;
 	unsigned long *buffer;
@@ -97,20 +97,20 @@ int __init bpa_nvram_init(void)
 
 	ret = -ENODEV;
 	nvram_addr = buffer[0];
-	bpa_nvram_len = buffer[1];
-	if ( (!bpa_nvram_len) || (!nvram_addr) )
+	mmio_nvram_len = buffer[1];
+	if ( (!mmio_nvram_len) || (!nvram_addr) )
 		goto out;
 
-	bpa_nvram_start = ioremap(nvram_addr, bpa_nvram_len);
-	if (!bpa_nvram_start)
+	mmio_nvram_start = ioremap(nvram_addr, mmio_nvram_len);
+	if (!mmio_nvram_start)
 		goto out;
 
-	printk(KERN_INFO "BPA NVRAM, %luk mapped to %p\n",
-	       bpa_nvram_len >> 10, bpa_nvram_start);
+	printk(KERN_INFO "mmio NVRAM, %luk mapped to %p\n",
+	       mmio_nvram_len >> 10, mmio_nvram_start);
 
-	ppc_md.nvram_read	= bpa_nvram_read;
-	ppc_md.nvram_write	= bpa_nvram_write;
-	ppc_md.nvram_size	= bpa_nvram_get_size;
+	ppc_md.nvram_read	= mmio_nvram_read;
+	ppc_md.nvram_write	= mmio_nvram_write;
+	ppc_md.nvram_size	= mmio_nvram_get_size;
 
 out:
 	of_node_put(nvram_node);
diff --git a/arch/ppc64/kernel/bpa_setup.c b/arch/ppc64/kernel/bpa_setup.c
index c2dc8f282eb8..9a495634d0c2 100644
--- a/arch/ppc64/kernel/bpa_setup.c
+++ b/arch/ppc64/kernel/bpa_setup.c
@@ -1,11 +1,11 @@
 /*
- *  linux/arch/ppc/kernel/bpa_setup.c
+ *  linux/arch/powerpc/platforms/cell/cell_setup.c
  *
  *  Copyright (C) 1995  Linus Torvalds
  *  Adapted from 'alpha' version by Gary Thomas
  *  Modified by Cort Dougan (cort@cs.nmt.edu)
  *  Modified by PPC64 Team, IBM Corp
- *  Modified by BPA Team, IBM Deutschland Entwicklung GmbH
+ *  Modified by Cell Team, IBM Deutschland Entwicklung GmbH
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License
@@ -46,8 +46,8 @@
 #include <asm/ppc-pci.h>
 #include <asm/irq.h>
 
-#include "bpa_iic.h"
-#include "bpa_iommu.h"
+#include "interrupt.h"
+#include "iommu.h"
 
 #ifdef DEBUG
 #define DBG(fmt...) udbg_printf(fmt)
@@ -55,7 +55,7 @@
 #define DBG(fmt...)
 #endif
 
-void bpa_show_cpuinfo(struct seq_file *m)
+void cell_show_cpuinfo(struct seq_file *m)
 {
 	struct device_node *root;
 	const char *model = "";
@@ -63,22 +63,22 @@ void bpa_show_cpuinfo(struct seq_file *m)
 	root = of_find_node_by_path("/");
 	if (root)
 		model = get_property(root, "model", NULL);
-	seq_printf(m, "machine\t\t: BPA %s\n", model);
+	seq_printf(m, "machine\t\t: CHRP %s\n", model);
 	of_node_put(root);
 }
 
-static void bpa_progress(char *s, unsigned short hex)
+static void cell_progress(char *s, unsigned short hex)
 {
 	printk("*** %04x : %s\n", hex, s ? s : "");
 }
 
-static void __init bpa_setup_arch(void)
+static void __init cell_setup_arch(void)
 {
 	ppc_md.init_IRQ       = iic_init_IRQ;
 	ppc_md.get_irq        = iic_get_irq;
 
 #ifdef CONFIG_SMP
-	smp_init_pSeries();
+	smp_init_cell();
 #endif
 
 	/* init to some ~sane value until calibrate_delay() runs */
@@ -97,39 +97,39 @@ static void __init bpa_setup_arch(void)
 	conswitchp = &dummy_con;
 #endif
 
-	bpa_nvram_init();
+	mmio_nvram_init();
 }
 
 /*
  * Early initialization.  Relocation is on but do not reference unbolted pages
  */
-static void __init bpa_init_early(void)
+static void __init cell_init_early(void)
 {
-	DBG(" -> bpa_init_early()\n");
+	DBG(" -> cell_init_early()\n");
 
 	hpte_init_native();
 
-	bpa_init_iommu();
+	cell_init_iommu();
 
-	ppc64_interrupt_controller = IC_BPA_IIC;
+	ppc64_interrupt_controller = IC_CELL_PIC;
 
-	DBG(" <- bpa_init_early()\n");
+	DBG(" <- cell_init_early()\n");
 }
 
 
-static int __init bpa_probe(int platform)
+static int __init cell_probe(int platform)
 {
-	if (platform != PLATFORM_BPA)
+	if (platform != PLATFORM_CELL)
 		return 0;
 
 	return 1;
 }
 
-struct machdep_calls __initdata bpa_md = {
-	.probe			= bpa_probe,
-	.setup_arch		= bpa_setup_arch,
-	.init_early		= bpa_init_early,
-	.show_cpuinfo		= bpa_show_cpuinfo,
+struct machdep_calls __initdata cell_md = {
+	.probe			= cell_probe,
+	.setup_arch		= cell_setup_arch,
+	.init_early		= cell_init_early,
+	.show_cpuinfo		= cell_show_cpuinfo,
 	.restart		= rtas_restart,
 	.power_off		= rtas_power_off,
 	.halt			= rtas_halt,
@@ -137,5 +137,5 @@ struct machdep_calls __initdata bpa_md = {
 	.get_rtc_time		= rtas_get_rtc_time,
 	.set_rtc_time		= rtas_set_rtc_time,
 	.calibrate_decr		= generic_calibrate_decr,
-	.progress		= bpa_progress,
+	.progress		= cell_progress,
 };
diff --git a/arch/ppc64/kernel/irq.c b/arch/ppc64/kernel/irq.c
index f41afe545045..b072ed6f77ad 100644
--- a/arch/ppc64/kernel/irq.c
+++ b/arch/ppc64/kernel/irq.c
@@ -392,7 +392,7 @@ int virt_irq_create_mapping(unsigned int real_irq)
 	if (ppc64_interrupt_controller == IC_OPEN_PIC)
 		return real_irq;	/* no mapping for openpic (for now) */
 
-	if (ppc64_interrupt_controller == IC_BPA_IIC)
+	if (ppc64_interrupt_controller == IC_CELL_PIC)
 		return real_irq;	/* no mapping for iic either */
 
 	/* don't map interrupts < MIN_VIRT_IRQ */
diff --git a/arch/ppc64/kernel/proc_ppc64.c b/arch/ppc64/kernel/proc_ppc64.c
index a87c66a9652a..24e955ee9487 100644
--- a/arch/ppc64/kernel/proc_ppc64.c
+++ b/arch/ppc64/kernel/proc_ppc64.c
@@ -53,7 +53,7 @@ static int __init proc_ppc64_create(void)
 	if (!root)
 		return 1;
 
-	if (!(systemcfg->platform & (PLATFORM_PSERIES | PLATFORM_BPA)))
+	if (!(systemcfg->platform & (PLATFORM_PSERIES | PLATFORM_CELL)))
 		return 0;
 
 	if (!proc_mkdir("rtas", root))
diff --git a/arch/ppc64/kernel/prom_init.c b/arch/ppc64/kernel/prom_init.c
index 69924ba4d7d9..a4bbca6dbb8b 100644
--- a/arch/ppc64/kernel/prom_init.c
+++ b/arch/ppc64/kernel/prom_init.c
@@ -1939,9 +1939,9 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4, unsigned long
 		prom_send_capabilities();
 
 	/*
-	 * On pSeries and BPA, copy the CPU hold code
+	 * On pSeries and Cell, copy the CPU hold code
 	 */
-       	if (RELOC(of_platform) & (PLATFORM_PSERIES | PLATFORM_BPA))
+       	if (RELOC(of_platform) & (PLATFORM_PSERIES | PLATFORM_CELL))
        		copy_and_flush(0, KERNELBASE - offset, 0x100, 0);
 
 	/*
diff --git a/arch/ppc64/kernel/spider-pic.c b/arch/ppc64/kernel/spider-pic.c
index d5c9a02fb119..e74132188bdf 100644
--- a/arch/ppc64/kernel/spider-pic.c
+++ b/arch/ppc64/kernel/spider-pic.c
@@ -27,7 +27,7 @@
 #include <asm/prom.h>
 #include <asm/io.h>
 
-#include "bpa_iic.h"
+#include "interrupt.h"
 
 /* register layout taken from Spider spec, table 7.4-4 */
 enum {