diff options
| author | Kumar Gala <galak@freescale.com> | 2005-09-22 06:54:58 +0200 |
|---|---|---|
| committer | Linus Torvalds <torvalds@g5.osdl.org> | 2005-09-22 18:41:35 +0200 |
| commit | 3fd07d3bf0077dcc0f5a33d2eb1938ea050da8da (patch) | |
| tree | 7d6b7175975e342b7749c06d2f41867783836f73 /arch/ppc | |
| parent | [PATCH] USB: Update Documentation/usb/URB.txt (diff) | |
| download | linux-3fd07d3bf0077dcc0f5a33d2eb1938ea050da8da.tar.xz linux-3fd07d3bf0077dcc0f5a33d2eb1938ea050da8da.zip | |
[PATCH] ppc32: Fix configuration of PCI IO space on MPC85xx platform
For platforms that don't have PCI IO at 0 the outbound window
registers were not being properly configured.
Signed-off-by: Andrew Klossner <andrew@cesa.opbu.xerox.com>
Signed-off-by: Kumar K. Gala <kumar.gala@freescale.com>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/ppc')
| -rw-r--r-- | arch/ppc/syslib/ppc85xx_setup.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/ppc/syslib/ppc85xx_setup.c b/arch/ppc/syslib/ppc85xx_setup.c index b7242f1bd931..832b8bf99ae7 100644 --- a/arch/ppc/syslib/ppc85xx_setup.c +++ b/arch/ppc/syslib/ppc85xx_setup.c @@ -184,8 +184,8 @@ mpc85xx_setup_pci1(struct pci_controller *hose) pci->powar1 = 0x80044000 | (__ilog2(MPC85XX_PCI1_UPPER_MEM - MPC85XX_PCI1_LOWER_MEM + 1) - 1); - /* Setup outboud IO windows @ MPC85XX_PCI1_IO_BASE */ - pci->potar2 = 0x00000000; + /* Setup outbound IO windows @ MPC85XX_PCI1_IO_BASE */ + pci->potar2 = (MPC85XX_PCI1_LOWER_IO >> 12) & 0x000fffff; pci->potear2 = 0x00000000; pci->powbar2 = (MPC85XX_PCI1_IO_BASE >> 12) & 0x000fffff; /* Enable, IO R/W */ @@ -235,8 +235,8 @@ mpc85xx_setup_pci2(struct pci_controller *hose) pci->powar1 = 0x80044000 | (__ilog2(MPC85XX_PCI2_UPPER_MEM - MPC85XX_PCI2_LOWER_MEM + 1) - 1); - /* Setup outboud IO windows @ MPC85XX_PCI2_IO_BASE */ - pci->potar2 = 0x00000000; + /* Setup outbound IO windows @ MPC85XX_PCI2_IO_BASE */ + pci->potar2 = (MPC85XX_PCI2_LOWER_IO >> 12) & 0x000fffff;; pci->potear2 = 0x00000000; pci->powbar2 = (MPC85XX_PCI2_IO_BASE >> 12) & 0x000fffff; /* Enable, IO R/W */ |