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authorVincent Chen <vincent.chen@sifive.com>2021-03-22 15:26:06 +0100
committerPalmer Dabbelt <palmerdabbelt@google.com>2021-04-26 17:24:58 +0200
commitbff3ff525460b492dca1d1665e821d2b5816ebdb (patch)
tree2539544e7184b7974f96c38fced50a3516f92aa5 /arch/riscv/Kconfig.erratas
parentriscv: sifive: Apply errata "cip-453" patch (diff)
downloadlinux-bff3ff525460b492dca1d1665e821d2b5816ebdb.tar.xz
linux-bff3ff525460b492dca1d1665e821d2b5816ebdb.zip
riscv: sifive: Apply errata "cip-1200" patch
For certain SiFive CPUs, "sfence.vma addr" cannot exactly flush addr from TLB in the particular cases. The details could be found here: https://sifive.cdn.prismic.io/sifive/167a1a56-03f4-4615-a79e-b2a86153148f_FU740_errata_20210205.pdf In order to ensure the functionality, this patch uses the Alternative scheme to replace all "sfence.vma addr" with "sfence.vma" at runtime. Signed-off-by: Vincent Chen <vincent.chen@sifive.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
Diffstat (limited to 'arch/riscv/Kconfig.erratas')
-rw-r--r--arch/riscv/Kconfig.erratas11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/riscv/Kconfig.erratas b/arch/riscv/Kconfig.erratas
index b4146dca50fc..d5d03ae8d685 100644
--- a/arch/riscv/Kconfig.erratas
+++ b/arch/riscv/Kconfig.erratas
@@ -30,4 +30,15 @@ config ERRATA_SIFIVE_CIP_453
If you don't know what to do here, say "Y".
+config ERRATA_SIFIVE_CIP_1200
+ bool "Apply SiFive errata CIP-1200"
+ depends on ERRATA_SIFIVE
+ default y
+ help
+ This will apply the SiFive CIP-1200 errata to repalce all
+ "sfence.vma addr" with "sfence.vma" to ensure that the addr
+ has been flushed from TLB.
+
+ If you don't know what to do here, say "Y".
+
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