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| author | Charlie Jenkins <charlie@rivosinc.com> | 2024-07-19 18:15:18 +0200 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@rivosinc.com> | 2024-07-23 00:36:54 +0200 |
| commit | 23c996fc2bc1978a02c64eddb90b4ab5d309c8df (patch) | |
| tree | d668d065eb0e3aab62c1d766fad8376a3f78dc1c /arch/riscv/Kconfig | |
| parent | Merge patch series "riscv: Apply Zawrs when available" (diff) | |
| download | linux-23c996fc2bc1978a02c64eddb90b4ab5d309c8df.tar.xz linux-23c996fc2bc1978a02c64eddb90b4ab5d309c8df.zip | |
riscv: Extend cpufeature.c to detect vendor extensions
Instead of grouping all vendor extensions into the same riscv_isa_ext
that standard instructions use, create a struct
"riscv_isa_vendor_ext_data_list" that allows each vendor to maintain
their vendor extensions independently of the standard extensions.
xandespmu is currently the only vendor extension so that is the only
extension that is affected by this change.
An additional benefit of this is that the extensions of each vendor can
be conditionally enabled. A config RISCV_ISA_VENDOR_EXT_ANDES has been
added to allow for that.
Signed-off-by: Charlie Jenkins <charlie@rivosinc.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Andy Chiu <andy.chiu@sifive.com>
Tested-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com>
Link: https://lore.kernel.org/r/20240719-support_vendor_extensions-v3-1-0af7587bbec0@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'arch/riscv/Kconfig')
| -rw-r--r-- | arch/riscv/Kconfig | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index a96a8dadf662..2b12d97eca63 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -808,6 +808,8 @@ config RISCV_EFFICIENT_UNALIGNED_ACCESS endchoice +source "arch/riscv/Kconfig.vendor" + endmenu # "Platform type" menu "Kernel features" |