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| author | Paul Walmsley <paul.walmsley@sifive.com> | 2019-05-20 18:19:40 +0200 |
|---|---|---|
| committer | Paul Walmsley <paul.walmsley@sifive.com> | 2019-06-17 11:03:40 +0200 |
| commit | 8d4e048d60bd03c29ce6bb9615a18f08b8eb5c89 (patch) | |
| tree | eb884170f46ab0ae746932a5b798ae5f1d64a922 /arch/riscv/boot | |
| parent | riscv: Fix udelay in RV32. (diff) | |
| download | linux-8d4e048d60bd03c29ce6bb9615a18f08b8eb5c89.tar.xz linux-8d4e048d60bd03c29ce6bb9615a18f08b8eb5c89.zip | |
arch: riscv: add support for building DTB files from DT source data
Similar to ARM64, add support for building DTB files from DT source
data for RISC-V boards.
This patch starts with the infrastructure needed for SiFive boards.
Boards from other vendors would add support here in a similar form.
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Loys Ollivier <lollivier@baylibre.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Cc: Palmer Dabbelt <palmer@sifive.com>
Cc: Albert Ou <aou@eecs.berkeley.edu>
Diffstat (limited to 'arch/riscv/boot')
| -rw-r--r-- | arch/riscv/boot/dts/Makefile | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/riscv/boot/dts/Makefile b/arch/riscv/boot/dts/Makefile new file mode 100644 index 000000000000..dcc3ada78455 --- /dev/null +++ b/arch/riscv/boot/dts/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0 +subdir-y += sifive |