diff options
| author | Palmer Dabbelt <palmer@rivosinc.com> | 2021-11-19 17:44:04 +0100 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@rivosinc.com> | 2022-01-06 05:06:34 +0100 |
| commit | 61063ad3e90af1a335dafd00b38eecf545088519 (patch) | |
| tree | 5403b646f42ae41e576caf74458cfed317c53700 /arch/riscv/configs | |
| parent | RISC-V: MAXPHYSMEM_2GB doesn't depend on CMODEL_MEDLOW (diff) | |
| download | linux-61063ad3e90af1a335dafd00b38eecf545088519.tar.xz linux-61063ad3e90af1a335dafd00b38eecf545088519.zip | |
RISC-V: defconfigs: Sort CONFIG_BPF_SYSCALL
This should have no functional change, it just sorts CONFIG_BPF_SYSCALL
the same way savedefconfig does.
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'arch/riscv/configs')
| -rw-r--r-- | arch/riscv/configs/defconfig | 2 | ||||
| -rw-r--r-- | arch/riscv/configs/rv32_defconfig | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig index f2a2f9c9ed49..39f2fe71b216 100644 --- a/arch/riscv/configs/defconfig +++ b/arch/riscv/configs/defconfig @@ -2,6 +2,7 @@ CONFIG_SYSVIPC=y CONFIG_POSIX_MQUEUE=y CONFIG_NO_HZ_IDLE=y CONFIG_HIGH_RES_TIMERS=y +CONFIG_BPF_SYSCALL=y CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_CGROUPS=y @@ -13,7 +14,6 @@ CONFIG_USER_NS=y CONFIG_CHECKPOINT_RESTORE=y CONFIG_BLK_DEV_INITRD=y CONFIG_EXPERT=y -CONFIG_BPF_SYSCALL=y CONFIG_SOC_SIFIVE=y CONFIG_SOC_VIRT=y CONFIG_SOC_MICROCHIP_POLARFIRE=y diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig index cdd113e7a291..ffe96ec833f1 100644 --- a/arch/riscv/configs/rv32_defconfig +++ b/arch/riscv/configs/rv32_defconfig @@ -2,6 +2,7 @@ CONFIG_SYSVIPC=y CONFIG_POSIX_MQUEUE=y CONFIG_NO_HZ_IDLE=y CONFIG_HIGH_RES_TIMERS=y +CONFIG_BPF_SYSCALL=y CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_CGROUPS=y @@ -13,7 +14,6 @@ CONFIG_USER_NS=y CONFIG_CHECKPOINT_RESTORE=y CONFIG_BLK_DEV_INITRD=y CONFIG_EXPERT=y -CONFIG_BPF_SYSCALL=y CONFIG_SOC_SIFIVE=y CONFIG_SOC_VIRT=y CONFIG_ARCH_RV32I=y |