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authorAtish Patra <atishp@rivosinc.com>2024-04-20 17:17:17 +0200
committerAnup Patel <anup@brainfault.org>2024-04-22 07:43:42 +0200
commitd1927f64e0e1094f296842e127138cb5f3bf3c6d (patch)
tree26808337043ea2c0cbebc2238f1353533eaa26f7 /arch/riscv/include/asm/pgtable.h
parentRISCV: KVM: Introduce vcpu->reset_cntx_lock (diff)
downloadlinux-d1927f64e0e1094f296842e127138cb5f3bf3c6d.tar.xz
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RISC-V: Fix the typo in Scountovf CSR name
The counter overflow CSR name is "scountovf" not "sscountovf". Fix the csr name. Fixes: 4905ec2fb7e6 ("RISC-V: Add sscofpmf extension support") Reviewed-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Anup Patel <anup@brainfault.org> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Atish Patra <atishp@rivosinc.com> Link: https://lore.kernel.org/r/20240420151741.962500-2-atishp@rivosinc.com Signed-off-by: Anup Patel <anup@brainfault.org>
Diffstat (limited to 'arch/riscv/include/asm/pgtable.h')
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