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authorVincent Chen <vincent.chen@sifive.com>2021-03-22 15:26:03 +0100
committerPalmer Dabbelt <palmerdabbelt@google.com>2021-04-26 17:24:55 +0200
commit6f4eea90465ad0cd5f3d041b9b2c728426f2b8d4 (patch)
tree7a7f210cfc5003dd70c0fba9e100cb7a8efea5df /arch/riscv/include/asm/sections.h
parentriscv: Add 3 SBI wrapper functions to get cpu manufacturer information (diff)
downloadlinux-6f4eea90465ad0cd5f3d041b9b2c728426f2b8d4.tar.xz
linux-6f4eea90465ad0cd5f3d041b9b2c728426f2b8d4.zip
riscv: Introduce alternative mechanism to apply errata solution
Introduce the "alternative" mechanism from ARM64 and x86 to apply the CPU vendors' errata solution at runtime. The main purpose of this patch is to provide a framework. Therefore, the implementation is quite basic for now so that some scenarios could not use this schemei, such as patching code to a module, relocating the patching code and heterogeneous CPU topology. Users could use the macro ALTERNATIVE to apply an errata to the existing code flow. In the macro ALTERNATIVE, users need to specify the manufacturer information(vendorid, archid, and impid) for this errata. Therefore, kernel will know this errata is suitable for which CPU core. During the booting procedure, kernel will select the errata required by the CPU core and then patch it. It means that the kernel only applies the errata to the specified CPU core. In this case, the vendor's errata does not affect each other at runtime. The above patching procedure only occurs during the booting phase, so we only take the overhead of the "alternative" mechanism once. This "alternative" mechanism is enabled by default to ensure that all required errata will be applied. However, users can disable this feature by the Kconfig "CONFIG_RISCV_ERRATA_ALTERNATIVE". Signed-off-by: Vincent Chen <vincent.chen@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
Diffstat (limited to 'arch/riscv/include/asm/sections.h')
-rw-r--r--arch/riscv/include/asm/sections.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/riscv/include/asm/sections.h b/arch/riscv/include/asm/sections.h
index 1595c5b60cfd..8a303fb1ee3b 100644
--- a/arch/riscv/include/asm/sections.h
+++ b/arch/riscv/include/asm/sections.h
@@ -11,5 +11,6 @@ extern char _start[];
extern char _start_kernel[];
extern char __init_data_begin[], __init_data_end[];
extern char __init_text_begin[], __init_text_end[];
+extern char __alt_start[], __alt_end[];
#endif /* __ASM_SECTIONS_H */