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| author | Palmer Dabbelt <palmer@rivosinc.com> | 2023-09-08 19:16:06 +0200 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@rivosinc.com> | 2023-09-08 20:24:38 +0200 |
| commit | f0936363547948e0c2b757aff52f6ee29396651d (patch) | |
| tree | fbe859fbc430153fe4cf41a50218759be0438793 /arch/riscv/include/uapi/asm/ptrace.h | |
| parent | Merge patch series "Add non-coherent DMA support for AX45MP" (diff) | |
| parent | RISC-V: Add ptrace support for vectors (diff) | |
| download | linux-f0936363547948e0c2b757aff52f6ee29396651d.tar.xz linux-f0936363547948e0c2b757aff52f6ee29396651d.zip | |
Merge patch "RISC-V: Add ptrace support for vectors"
This resurrects the vector ptrace() support that was removed for 6.5 due
to some bugs cropping up as part of the GDB review process.
* b4-shazam-merge:
RISC-V: Add ptrace support for vectors
Link: https://lore.kernel.org/r/20230825050248.32681-1-andy.chiu@sifive.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'arch/riscv/include/uapi/asm/ptrace.h')
| -rw-r--r-- | arch/riscv/include/uapi/asm/ptrace.h | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/arch/riscv/include/uapi/asm/ptrace.h b/arch/riscv/include/uapi/asm/ptrace.h index 6d2d9afaabea..a38268b19c3d 100644 --- a/arch/riscv/include/uapi/asm/ptrace.h +++ b/arch/riscv/include/uapi/asm/ptrace.h @@ -108,13 +108,18 @@ struct __riscv_v_ext_state { * In signal handler, datap will be set a correct user stack offset * and vector registers will be copied to the address of datap * pointer. - * - * In ptrace syscall, datap will be set to zero and the vector - * registers will be copied to the address right after this - * structure. */ }; +struct __riscv_v_regset_state { + unsigned long vstart; + unsigned long vl; + unsigned long vtype; + unsigned long vcsr; + unsigned long vlenb; + char vreg[]; +}; + /* * According to spec: The number of bits in a single vector register, * VLEN >= ELEN, which must be a power of 2, and must be no greater than |