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author | Liu Shixin <liushixin2@huawei.com> | 2021-06-15 05:07:34 +0200 |
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committer | Palmer Dabbelt <palmerdabbelt@google.com> | 2021-07-01 05:55:41 +0200 |
commit | 47513f243b452a5e21180dcf3d6ac1c57e1781a6 (patch) | |
tree | aa27c8636f678455c2ece08ee1f5caf8d2e8854f /arch/riscv/kernel/setup.c | |
parent | RISC-V: Use asm-generic for {in,out}{bwlq} (diff) | |
download | linux-47513f243b452a5e21180dcf3d6ac1c57e1781a6.tar.xz linux-47513f243b452a5e21180dcf3d6ac1c57e1781a6.zip |
riscv: Enable KFENCE for riscv64
Add architecture specific implementation details for KFENCE and enable
KFENCE for the riscv64 architecture. In particular, this implements the
required interface in <asm/kfence.h>.
KFENCE requires that attributes for pages from its memory pool can
individually be set. Therefore, force the kfence pool to be mapped at
page granularity.
Testing this patch using the testcases in kfence_test.c and all passed.
Signed-off-by: Liu Shixin <liushixin2@huawei.com>
Acked-by: Marco Elver <elver@google.com>
Reviewed-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
Diffstat (limited to 'arch/riscv/kernel/setup.c')
0 files changed, 0 insertions, 0 deletions