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author | Vitaly Wool <vitaly.wool@konsulko.com> | 2021-05-31 10:53:42 +0200 |
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committer | Palmer Dabbelt <palmerdabbelt@google.com> | 2021-06-11 01:16:06 +0200 |
commit | 5e63215c2f64079fbd011df5005c8bea63f149c2 (patch) | |
tree | 521335babc29f534c56570d246aed170ddc26822 /arch/riscv/kernel/vmlinux-xip.lds.S | |
parent | Merge remote-tracking branch 'riscv/riscv-wx-mappings' into fixes (diff) | |
download | linux-5e63215c2f64079fbd011df5005c8bea63f149c2.tar.xz linux-5e63215c2f64079fbd011df5005c8bea63f149c2.zip |
riscv: xip: support runtime trap patching
RISCV_ERRATA_ALTERNATIVE patches text at runtime which is currently
not possible when the kernel is executed from the flash in XIP mode.
Since runtime patching concerns only traps at the moment, let's just
have all the traps reside in RAM anyway if RISCV_ERRATA_ALTERNATIVE
is set. Thus, these functions will be patch-able even when the .text
section is in flash.
Signed-off-by: Vitaly Wool <vitaly.wool@konsulko.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
Diffstat (limited to '')
-rw-r--r-- | arch/riscv/kernel/vmlinux-xip.lds.S | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/arch/riscv/kernel/vmlinux-xip.lds.S b/arch/riscv/kernel/vmlinux-xip.lds.S index 4b29b9917f99..a3ff09c4c3f9 100644 --- a/arch/riscv/kernel/vmlinux-xip.lds.S +++ b/arch/riscv/kernel/vmlinux-xip.lds.S @@ -99,9 +99,22 @@ SECTIONS } PERCPU_SECTION(L1_CACHE_BYTES) - . = ALIGN(PAGE_SIZE); + . = ALIGN(8); + .alternative : { + __alt_start = .; + *(.alternative) + __alt_end = .; + } __init_end = .; + . = ALIGN(16); + .xip.traps : { + __xip_traps_start = .; + *(.xip.traps) + __xip_traps_end = .; + } + + . = ALIGN(PAGE_SIZE); .sdata : { __global_pointer$ = . + 0x800; *(.sdata*) |