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author | Linus Torvalds <torvalds@linux-foundation.org> | 2020-06-05 05:14:18 +0200 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2020-06-05 05:14:18 +0200 |
commit | 435faf5c218a47fd6258187f62d9bb1009717896 (patch) | |
tree | 2345207a7a739b4519b912ceeda15847714a6fd9 /arch/riscv/mm/init.c | |
parent | Merge tag 'devicetree-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/g... (diff) | |
parent | soc: sifive: l2 cache: Mark l2_get_priv_group as static (diff) | |
download | linux-435faf5c218a47fd6258187f62d9bb1009717896.tar.xz linux-435faf5c218a47fd6258187f62d9bb1009717896.zip |
Merge tag 'riscv-for-linus-5.8-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
Pull RISC-V updates from Palmer Dabbelt:
- The remainder of the code necessary to support the Kendryte K210:
* Support for building device trees into the kernel, as the K210
doesn't have a bootloader that provides one
* A K210 device tree and the associated defconfig update
* Support for skipping PMP initialization on systems that trap on
PMP accesses rather than treating them as WARL
- Support for KGDB
- Improvements to text patching
- Some cleanups to the SiFive L2 cache driver
* tag 'riscv-for-linus-5.8-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
soc: sifive: l2 cache: Mark l2_get_priv_group as static
soc: sifive: l2 cache: Eliminate an unsigned zero compare warning
riscv: Add support to determine no. of L2 cache way enabled
riscv: cacheinfo: Implement cache_get_priv_group with a generic ops structure
riscv: Use text_mutex instead of patch_lock
riscv: Use NOKPROBE_SYMBOL() instead of __krpobes annotation
riscv: Remove the 'riscv_' prefix of function name
riscv: Add SW single-step support for KDB
riscv: Use the XML target descriptions to report 3 system registers
riscv: Add KGDB support
kgdb: Add kgdb_has_hit_break function
RISC-V: Skip setting up PMPs on traps
riscv: K210: Update defconfig
riscv: K210: Add a built-in device tree
riscv: Allow device trees to be built into the kernel
Diffstat (limited to 'arch/riscv/mm/init.c')
-rw-r--r-- | arch/riscv/mm/init.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c index 939159b13a13..34327407b0c5 100644 --- a/arch/riscv/mm/init.c +++ b/arch/riscv/mm/init.c @@ -17,6 +17,7 @@ #include <asm/fixmap.h> #include <asm/tlbflush.h> #include <asm/sections.h> +#include <asm/soc.h> #include <asm/pgtable.h> #include <asm/io.h> #include <asm/ptdump.h> @@ -494,7 +495,15 @@ void free_initmem(void) #else asmlinkage void __init setup_vm(uintptr_t dtb_pa) { +#ifdef CONFIG_BUILTIN_DTB + dtb_early_va = soc_lookup_builtin_dtb(); + if (!dtb_early_va) { + /* Fallback to first available DTS */ + dtb_early_va = (void *) __dtb_start; + } +#else dtb_early_va = (void *)dtb_pa; +#endif } static inline void setup_vm_final(void) |