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authorZong Li <zong@andestech.com>2018-03-15 09:50:51 +0100
committerPalmer Dabbelt <palmer@sifive.com>2018-04-03 05:00:56 +0200
commite21d54219c7a698b10d5f1e6a1023ebde284cd7b (patch)
tree123d29fda738f23349835d5776cd9ff8f834428e /arch/riscv
parentRISC-V: Enable module support in defconfig (diff)
downloadlinux-e21d54219c7a698b10d5f1e6a1023ebde284cd7b.tar.xz
linux-e21d54219c7a698b10d5f1e6a1023ebde284cd7b.zip
RISC-V: Add definition of relocation types
Signed-off-by: Zong Li <zong@andestech.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'arch/riscv')
-rw-r--r--arch/riscv/include/uapi/asm/elf.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/riscv/include/uapi/asm/elf.h b/arch/riscv/include/uapi/asm/elf.h
index a510edfa8226..5cae4c30cd8e 100644
--- a/arch/riscv/include/uapi/asm/elf.h
+++ b/arch/riscv/include/uapi/asm/elf.h
@@ -79,5 +79,12 @@ typedef union __riscv_fp_state elf_fpregset_t;
#define R_RISCV_TPREL_I 49
#define R_RISCV_TPREL_S 50
#define R_RISCV_RELAX 51
+#define R_RISCV_SUB6 52
+#define R_RISCV_SET6 53
+#define R_RISCV_SET8 54
+#define R_RISCV_SET16 55
+#define R_RISCV_SET32 56
+#define R_RISCV_32_PCREL 57
+
#endif /* _UAPI_ASM_ELF_H */