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| author | Paolo Bonzini <pbonzini@redhat.com> | 2023-01-13 17:27:55 +0100 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2023-01-24 12:05:23 +0100 |
| commit | dc7c31e922787466957cadf2c0ad21c0f9a4091f (patch) | |
| tree | b6c6feeb812282a21d00ae59eaa69033b6c1078a /arch/riscv | |
| parent | Merge branch 'kvm-hw-enable-refactor' into HEAD (diff) | |
| parent | KVM: x86/xen: Avoid deadlock by adding kvm->arch.xen.xen_lock leaf node lock (diff) | |
| download | linux-dc7c31e922787466957cadf2c0ad21c0f9a4091f.tar.xz linux-dc7c31e922787466957cadf2c0ad21c0f9a4091f.zip | |
Merge branch 'kvm-v6.2-rc4-fixes' into HEAD
ARM:
* Fix the PMCR_EL0 reset value after the PMU rework
* Correctly handle S2 fault triggered by a S1 page table walk
by not always classifying it as a write, as this breaks on
R/O memslots
* Document why we cannot exit with KVM_EXIT_MMIO when taking
a write fault from a S1 PTW on a R/O memslot
* Put the Apple M2 on the naughty list for not being able to
correctly implement the vgic SEIS feature, just like the M1
before it
* Reviewer updates: Alex is stepping down, replaced by Zenghui
x86:
* Fix various rare locking issues in Xen emulation and teach lockdep
to detect them
* Documentation improvements
* Do not return host topology information from KVM_GET_SUPPORTED_CPUID
Diffstat (limited to 'arch/riscv')
| -rw-r--r-- | arch/riscv/include/asm/uaccess.h | 2 | ||||
| -rw-r--r-- | arch/riscv/kernel/probes/simulate-insn.h | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/arch/riscv/include/asm/uaccess.h b/arch/riscv/include/asm/uaccess.h index 855450bed9f5..ec0cab9fbddd 100644 --- a/arch/riscv/include/asm/uaccess.h +++ b/arch/riscv/include/asm/uaccess.h @@ -165,7 +165,7 @@ do { \ might_fault(); \ access_ok(__p, sizeof(*__p)) ? \ __get_user((x), __p) : \ - ((x) = 0, -EFAULT); \ + ((x) = (__force __typeof__(x))0, -EFAULT); \ }) #define __put_user_asm(insn, x, ptr, err) \ diff --git a/arch/riscv/kernel/probes/simulate-insn.h b/arch/riscv/kernel/probes/simulate-insn.h index cb6ff7dccb92..de8474146a9b 100644 --- a/arch/riscv/kernel/probes/simulate-insn.h +++ b/arch/riscv/kernel/probes/simulate-insn.h @@ -31,9 +31,9 @@ __RISCV_INSN_FUNCS(fence, 0x7f, 0x0f); } while (0) __RISCV_INSN_FUNCS(c_j, 0xe003, 0xa001); -__RISCV_INSN_FUNCS(c_jr, 0xf007, 0x8002); +__RISCV_INSN_FUNCS(c_jr, 0xf07f, 0x8002); __RISCV_INSN_FUNCS(c_jal, 0xe003, 0x2001); -__RISCV_INSN_FUNCS(c_jalr, 0xf007, 0x9002); +__RISCV_INSN_FUNCS(c_jalr, 0xf07f, 0x9002); __RISCV_INSN_FUNCS(c_beqz, 0xe003, 0xc001); __RISCV_INSN_FUNCS(c_bnez, 0xe003, 0xe001); __RISCV_INSN_FUNCS(c_ebreak, 0xffff, 0x9002); |