diff options
| author | Alexandre Ghiti <alexghiti@rivosinc.com> | 2024-01-30 12:55:08 +0100 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@rivosinc.com> | 2024-02-07 19:19:37 +0100 |
| commit | 3951f6add519a8e954bf78691a412f65b24f4715 (patch) | |
| tree | 63ce5788bb8591a04efa9b4a71e0bb61e4b3b0cd /arch/riscv | |
| parent | riscv: declare overflow_stack as exported from traps.c (diff) | |
| download | linux-3951f6add519a8e954bf78691a412f65b24f4715.tar.xz linux-3951f6add519a8e954bf78691a412f65b24f4715.zip | |
riscv: Fix arch_tlbbatch_flush() by clearing the batch cpumask
We must clear the cpumask once we have flushed the batch, otherwise cpus
get accumulated and we end sending IPIs to more cpus than needed.
Fixes: 54d7431af73e ("riscv: Add support for BATCHED_UNMAP_TLB_FLUSH")
Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Reviewed-by: Charlie Jenkins <charlie@rivosinc.com>
Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
Link: https://lore.kernel.org/r/20240130115508.105386-1-alexghiti@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'arch/riscv')
| -rw-r--r-- | arch/riscv/mm/tlbflush.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/riscv/mm/tlbflush.c b/arch/riscv/mm/tlbflush.c index dffb0e5bd942..893566e004b7 100644 --- a/arch/riscv/mm/tlbflush.c +++ b/arch/riscv/mm/tlbflush.c @@ -234,4 +234,5 @@ void arch_tlbbatch_flush(struct arch_tlbflush_unmap_batch *batch) { __flush_tlb_range(&batch->cpumask, FLUSH_TLB_NO_ASID, 0, FLUSH_TLB_MAX_SIZE, PAGE_SIZE); + cpumask_clear(&batch->cpumask); } |