s390: raise minimum supported machine generation to z10

Machine generations up to z9 (released in May 2006) have been officially
out of service for several years now (z9 end of service - January 31, 2019).
No distributions build kernels supporting those old machine generations
anymore, except Debian, which seems to pick the oldest supported
generation. The team supporting Debian on s390 has been notified about
the change.

Raising minimum supported machine generation to z10 helps to reduce
maintenance cost and effectively remove code, which is not getting
enough testing coverage due to lack of older hardware and distributions
support. Besides that this unblocks some optimization opportunities and
allows to use wider instruction set in asm files for future features
implementation. Due to this change spectre mitigation and usercopy
implementations could be drastically simplified and many newer instructions
could be converted from ".insn" encoding to instruction names.

Acked-by: Ilya Leoshkevich <iii@linux.ibm.com>
Reviewed-by: Heiko Carstens <hca@linux.ibm.com>
Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>

5 files changed, 3 insertions, 73 deletions

diff --git a/arch/s390/include/asm/bitops.h b/arch/s390/include/asm/bitops.h
index 1d40630128a5..191dc7898b0f 100644
--- a/arch/s390/include/asm/bitops.h
+++ b/arch/s390/include/asm/bitops.h
@@ -256,8 +256,6 @@ static inline bool test_bit_inv(unsigned long nr,
 	return test_bit(nr ^ (BITS_PER_LONG - 1), ptr);
 }
 
-#ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES
-
 /**
  * __flogr - find leftmost one
  * @word - The word to search
@@ -376,16 +374,6 @@ static inline int fls(unsigned int word)
 	return fls64(word);
 }
 
-#else /* CONFIG_HAVE_MARCH_Z9_109_FEATURES */
-
-#include <asm-generic/bitops/__ffs.h>
-#include <asm-generic/bitops/ffs.h>
-#include <asm-generic/bitops/__fls.h>
-#include <asm-generic/bitops/fls.h>
-#include <asm-generic/bitops/fls64.h>
-
-#endif /* CONFIG_HAVE_MARCH_Z9_109_FEATURES */
-
 #include <asm-generic/bitops/ffz.h>
 #include <asm-generic/bitops/hweight.h>
 #include <asm-generic/bitops/sched.h>
diff --git a/arch/s390/include/asm/lowcore.h b/arch/s390/include/asm/lowcore.h
index 9829d6b44a20..56002aeacabf 100644
--- a/arch/s390/include/asm/lowcore.h
+++ b/arch/s390/include/asm/lowcore.h
@@ -163,11 +163,9 @@ struct lowcore {
 	__u64	gmap;				/* 0x03d0 */
 	__u8	pad_0x03d8[0x0400-0x03d8];	/* 0x03d8 */
 
-	/* br %r1 trampoline */
-	__u16	br_r1_trampoline;		/* 0x0400 */
-	__u32	return_lpswe;			/* 0x0402 */
-	__u32	return_mcck_lpswe;		/* 0x0406 */
-	__u8	pad_0x040a[0x0e00-0x040a];	/* 0x040a */
+	__u32	return_lpswe;			/* 0x0400 */
+	__u32	return_mcck_lpswe;		/* 0x0404 */
+	__u8	pad_0x040a[0x0e00-0x0408];	/* 0x0408 */
 
 	/*
 	 * 0xe00 contains the address of the IPL Parameter Information
diff --git a/arch/s390/include/asm/nospec-insn.h b/arch/s390/include/asm/nospec-insn.h
index c670c1dd1293..62a99095f380 100644
--- a/arch/s390/include/asm/nospec-insn.h
+++ b/arch/s390/include/asm/nospec-insn.h
@@ -10,8 +10,6 @@
 
 #ifdef CC_USING_EXPOLINE
 
-_LC_BR_R1 = __LC_BR_R1
-
 /*
  * The expoline macros are used to create thunks in the same format
  * as gcc generates them. The 'comdat' section flag makes sure that
@@ -39,7 +37,6 @@ _LC_BR_R1 = __LC_BR_R1
 	.popsection
 	.endm
 
-#ifdef CONFIG_HAVE_MARCH_Z10_FEATURES
 	.macro __THUNK_PROLOG_BR r1,r2
 	__THUNK_PROLOG_NAME __s390_indirect_jump_r\r1
 	.endm
@@ -55,23 +52,6 @@ _LC_BR_R1 = __LC_BR_R1
 	.macro __THUNK_BRASL r1,r2,r3
 	brasl	\r1,__s390_indirect_jump_r\r2
 	.endm
-#else
-	.macro __THUNK_PROLOG_BR r1,r2
-	__THUNK_PROLOG_NAME __s390_indirect_jump_r\r2\()use_r\r1
-	.endm
-
-	.macro __THUNK_EPILOG_BR r1,r2
-	__THUNK_EPILOG_NAME __s390_indirect_jump_r\r2\()use_r\r1
-	.endm
-
-	.macro __THUNK_BR r1,r2
-	jg	__s390_indirect_jump_r\r2\()use_r\r1
-	.endm
-
-	.macro __THUNK_BRASL r1,r2,r3
-	brasl	\r1,__s390_indirect_jump_r\r3\()use_r\r2
-	.endm
-#endif
 
 	.macro	__DECODE_RR expand,reg,ruse
 	.set __decode_fail,1
@@ -112,22 +92,8 @@ _LC_BR_R1 = __LC_BR_R1
 	.endm
 
 	.macro __THUNK_EX_BR reg,ruse
-	# Be very careful when adding instructions to this macro!
-	# The ALTERNATIVE replacement code has a .+10 which targets
-	# the "br \reg" after the code has been patched.
-#ifdef CONFIG_HAVE_MARCH_Z10_FEATURES
 	exrl	0,555f
 	j	.
-#else
-	.ifc \reg,%r1
-	ALTERNATIVE "ex %r0,_LC_BR_R1", ".insn ril,0xc60000000000,0,.+10", 35
-	j	.
-	.else
-	larl	\ruse,555f
-	ex	0,0(\ruse)
-	j	.
-	.endif
-#endif
 555:	br	\reg
 	.endm
 
diff --git a/arch/s390/include/asm/timex.h b/arch/s390/include/asm/timex.h
index 50d9b04ecbd1..ca9a8ab1261a 100644
--- a/arch/s390/include/asm/timex.h
+++ b/arch/s390/include/asm/timex.h
@@ -187,14 +187,10 @@ static inline unsigned long get_tod_clock(void)
 
 static inline unsigned long get_tod_clock_fast(void)
 {
-#ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES
 	unsigned long clk;
 
 	asm volatile("stckf %0" : "=Q" (clk) : : "cc");
 	return clk;
-#else
-	return get_tod_clock();
-#endif
 }
 
 static inline cycles_t get_cycles(void)
diff --git a/arch/s390/include/asm/uaccess.h b/arch/s390/include/asm/uaccess.h
index 70916e26777d..e8b4b1a7ec82 100644
--- a/arch/s390/include/asm/uaccess.h
+++ b/arch/s390/include/asm/uaccess.h
@@ -92,8 +92,6 @@ union oac {
 	};
 };
 
-#ifdef CONFIG_HAVE_MARCH_Z10_FEATURES
-
 #define __put_get_user_asm(to, from, size, oac_spec)			\
 ({									\
 	int __rc;							\
@@ -187,22 +185,6 @@ static __always_inline int __get_user_fn(void *x, const void __user *ptr, unsign
 	return rc;
 }
 
-#else /* CONFIG_HAVE_MARCH_Z10_FEATURES */
-
-static inline int __put_user_fn(void *x, void __user *ptr, unsigned long size)
-{
-	size = raw_copy_to_user(ptr, x, size);
-	return size ? -EFAULT : 0;
-}
-
-static inline int __get_user_fn(void *x, const void __user *ptr, unsigned long size)
-{
-	size = raw_copy_from_user(x, ptr, size);
-	return size ? -EFAULT : 0;
-}
-
-#endif /* CONFIG_HAVE_MARCH_Z10_FEATURES */
-
 /*
  * These are the main single-value transfer routines.  They automatically
  * use the right size if we just have the right pointer type.