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authorMartin Schwidefsky <schwidefsky@de.ibm.com>2011-07-24 10:48:28 +0200
committerMartin Schwidefsky <schwidefsky@de.ibm.com>2011-07-24 10:48:22 +0200
commit5beab99100335936f4d845f9ae2f0e25796f2584 (patch)
tree001c61d9a2250caf3081aea8ab19590fb8fe6f1b /arch/s390/kernel/head64.S
parent[S390] race safe external interrupt registration (diff)
downloadlinux-5beab99100335936f4d845f9ae2f0e25796f2584.tar.xz
linux-5beab99100335936f4d845f9ae2f0e25796f2584.zip
[S390] iucv cr0 enablement bit
Do not set the cr0 enablement bit for iucv by default in head[31|64].S, move the enablement to iucv_init in the iucv base layer. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Diffstat (limited to 'arch/s390/kernel/head64.S')
-rw-r--r--arch/s390/kernel/head64.S2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/s390/kernel/head64.S b/arch/s390/kernel/head64.S
index 188602898c17..b6d30135e2ec 100644
--- a/arch/s390/kernel/head64.S
+++ b/arch/s390/kernel/head64.S
@@ -46,7 +46,7 @@ ENTRY(startup_continue)
.align 16
.LPG1:
.Lentry:.quad 0x0000000180000000,_stext
-.Lctl: .quad 0x04350002 # cr0: various things
+.Lctl: .quad 0x04350000 # cr0: various things
.quad 0 # cr1: primary space segment table
.quad .Lduct # cr2: dispatchable unit control table
.quad 0 # cr3: instruction authorization