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authorIngo Molnar <mingo@elte.hu>2009-06-11 23:31:52 +0200
committerIngo Molnar <mingo@elte.hu>2009-06-11 23:31:52 +0200
commit0d5959723e1db3fd7323c198a50c16cecf96c7a9 (patch)
tree802b623fff261ebcbbddadf84af5524398364a18 /arch/sh/Kconfig.cpu
parentx86, mce: Add boot options for corrected errors (diff)
parentMerge branch 'for-linus' of git://linux-arm.org/linux-2.6 (diff)
downloadlinux-0d5959723e1db3fd7323c198a50c16cecf96c7a9.tar.xz
linux-0d5959723e1db3fd7323c198a50c16cecf96c7a9.zip
Merge branch 'linus' into x86/mce3
Conflicts: arch/x86/kernel/cpu/mcheck/mce_64.c arch/x86/kernel/irq.c Merge reason: Resolve the conflicts above. Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/sh/Kconfig.cpu')
-rw-r--r--arch/sh/Kconfig.cpu8
1 files changed, 0 insertions, 8 deletions
diff --git a/arch/sh/Kconfig.cpu b/arch/sh/Kconfig.cpu
index c7d704381a6d..cd6e3ea598d5 100644
--- a/arch/sh/Kconfig.cpu
+++ b/arch/sh/Kconfig.cpu
@@ -76,11 +76,6 @@ config SPECULATIVE_EXECUTION
If unsure, say N.
-config SH64_USER_MISALIGNED_FIXUP
- def_bool y
- prompt "Fixup misaligned loads/stores occurring in user mode"
- depends on SUPERH64
-
config SH64_ID2815_WORKAROUND
bool "Include workaround for SH5-101 cut2 silicon defect ID2815"
depends on CPU_SUBTYPE_SH5_101
@@ -101,9 +96,6 @@ config CPU_HAS_SR_RB
See <file:Documentation/sh/register-banks.txt> for further
information on SR.RB and register banking in the kernel in general.
-config CPU_HAS_PTEA
- bool
-
config CPU_HAS_PTEAEX
bool