Linux-2.6.12-rc2v2.6.12-rc2

Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.

Let it rip!

4 files changed, 781 insertions, 0 deletions

diff --git a/arch/sh/boards/snapgear/Makefile b/arch/sh/boards/snapgear/Makefile
new file mode 100644
index 000000000000..59fc976bfc2f
--- /dev/null
+++ b/arch/sh/boards/snapgear/Makefile
@@ -0,0 +1,6 @@
+#
+# Makefile for the SnapGear specific parts of the kernel
+#
+
+obj-y	 := setup.o io.o rtc.o
+
diff --git a/arch/sh/boards/snapgear/io.c b/arch/sh/boards/snapgear/io.c
new file mode 100644
index 000000000000..e2eb78fc381d
--- /dev/null
+++ b/arch/sh/boards/snapgear/io.c
@@ -0,0 +1,226 @@
+/* 
+ * linux/arch/sh/kernel/io_7751se.c
+ *
+ * Copyright (C) 2002  David McCullough <davidm@snapgear.com>
+ * Copyright (C) 2001  Ian da Silva, Jeremy Siegel
+ * Based largely on io_se.c.
+ *
+ * I/O routine for Hitachi 7751 SolutionEngine.
+ *
+ * Initial version only to support LAN access; some
+ * placeholder code from io_se.c left in with the
+ * expectation of later SuperIO and PCMCIA access.
+ */
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <asm/io.h>
+#include <asm/addrspace.h>
+
+#include <asm/pci.h>
+#include "../../drivers/pci/pci-sh7751.h"
+
+#ifdef CONFIG_SH_SECUREEDGE5410
+unsigned short secureedge5410_ioport;
+#endif
+
+/*
+ * The SnapGear uses the built-in PCI controller (PCIC)
+ * of the 7751 processor
+ */ 
+
+#define PCIIOBR		(volatile long *)PCI_REG(SH7751_PCIIOBR)
+#define PCIMBR          (volatile long *)PCI_REG(SH7751_PCIMBR)
+#define PCI_IO_AREA	SH7751_PCI_IO_BASE
+#define PCI_MEM_AREA	SH7751_PCI_CONFIG_BASE
+
+
+#define PCI_IOMAP(adr)	(PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK))
+
+
+#define maybebadio(name,port) \
+  printk("bad PC-like io %s for port 0x%lx at 0x%08x\n", \
+	 #name, (port), (__u32) __builtin_return_address(0))
+
+
+static inline void delay(void)
+{
+	ctrl_inw(0xa0000000);
+}
+
+
+static inline volatile __u16 *port2adr(unsigned int port)
+{
+#if 0
+	if (port >= 0x2000)
+		return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000));
+#endif
+	maybebadio(name,(unsigned long)port);
+	return (volatile __u16*)port;
+}
+
+
+/* In case someone configures the kernel w/o PCI support: in that */
+/* scenario, don't ever bother to check for PCI-window addresses */
+
+/* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */
+#if defined(CONFIG_PCI)
+#define CHECK_SH7751_PCIIO(port) \
+  ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE)))
+#else
+#define CHECK_SH7751_PCIIO(port) (0)
+#endif
+
+/*
+ * General outline: remap really low stuff [eventually] to SuperIO,
+ * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO)
+ * is mapped through the PCI IO window.  Stuff with high bits (PXSEG)
+ * should be way beyond the window, and is used  w/o translation for
+ * compatibility.
+ */
+
+unsigned char snapgear_inb(unsigned long port)
+{
+	if (PXSEG(port))
+		return *(volatile unsigned char *)port;
+	else if (CHECK_SH7751_PCIIO(port))
+		return *(volatile unsigned char *)PCI_IOMAP(port);
+	else
+		return (*port2adr(port))&0xff; 
+}
+
+
+unsigned char snapgear_inb_p(unsigned long port)
+{
+	unsigned char v;
+
+	if (PXSEG(port))
+		v = *(volatile unsigned char *)port;
+	else if (CHECK_SH7751_PCIIO(port))
+		v = *(volatile unsigned char *)PCI_IOMAP(port);
+	else
+		v = (*port2adr(port))&0xff; 
+	delay();
+	return v;
+}
+
+
+unsigned short snapgear_inw(unsigned long port)
+{
+	if (PXSEG(port))
+		return *(volatile unsigned short *)port;
+	else if (CHECK_SH7751_PCIIO(port))
+		return *(volatile unsigned short *)PCI_IOMAP(port);
+	else if (port >= 0x2000)
+		return *port2adr(port);
+	else
+		maybebadio(inw, port);
+	return 0;
+}
+
+
+unsigned int snapgear_inl(unsigned long port)
+{
+	if (PXSEG(port))
+		return *(volatile unsigned long *)port;
+	else if (CHECK_SH7751_PCIIO(port))
+		return *(volatile unsigned int *)PCI_IOMAP(port);
+	else if (port >= 0x2000)
+		return *port2adr(port);
+	else
+		maybebadio(inl, port);
+	return 0;
+}
+
+
+void snapgear_outb(unsigned char value, unsigned long port)
+{
+
+	if (PXSEG(port))
+		*(volatile unsigned char *)port = value;
+	else if (CHECK_SH7751_PCIIO(port))
+		*((unsigned char*)PCI_IOMAP(port)) = value;
+	else
+		*(port2adr(port)) = value;
+}
+
+
+void snapgear_outb_p(unsigned char value, unsigned long port)
+{
+	if (PXSEG(port))
+		*(volatile unsigned char *)port = value;
+	else if (CHECK_SH7751_PCIIO(port))
+		*((unsigned char*)PCI_IOMAP(port)) = value;
+	else
+		*(port2adr(port)) = value;
+	delay();
+}
+
+
+void snapgear_outw(unsigned short value, unsigned long port)
+{
+	if (PXSEG(port))
+		*(volatile unsigned short *)port = value;
+	else if (CHECK_SH7751_PCIIO(port))
+		*((unsigned short *)PCI_IOMAP(port)) = value;
+	else if (port >= 0x2000)
+		*port2adr(port) = value;
+	else
+		maybebadio(outw, port);
+}
+
+
+void snapgear_outl(unsigned int value, unsigned long port)
+{
+	if (PXSEG(port))
+		*(volatile unsigned long *)port = value;
+	else if (CHECK_SH7751_PCIIO(port))
+		*((unsigned long*)PCI_IOMAP(port)) = value;
+	else
+		maybebadio(outl, port);
+}
+
+void snapgear_insl(unsigned long port, void *addr, unsigned long count)
+{
+	maybebadio(insl, port);
+}
+
+void snapgear_outsl(unsigned long port, const void *addr, unsigned long count)
+{
+	maybebadio(outsw, port);
+}
+
+/* Map ISA bus address to the real address. Only for PCMCIA.  */
+
+
+/* ISA page descriptor.  */
+static __u32 sh_isa_memmap[256];
+
+
+#if 0
+static int sh_isa_mmap(__u32 start, __u32 length, __u32 offset)
+{
+	int idx;
+
+	if (start >= 0x100000 || (start & 0xfff) || (length != 0x1000))
+		return -1;
+
+	idx = start >> 12;
+	sh_isa_memmap[idx] = 0xb8000000 + (offset &~ 0xfff);
+#if 0
+	printk("sh_isa_mmap: start %x len %x offset %x (idx %x paddr %x)\n",
+	       start, length, offset, idx, sh_isa_memmap[idx]);
+#endif
+	return 0;
+}
+#endif
+
+unsigned long snapgear_isa_port2addr(unsigned long offset)
+{
+	int idx;
+
+	idx = (offset >> 12) & 0xff;
+	offset &= 0xfff;
+	return sh_isa_memmap[idx] + offset;
+}
diff --git a/arch/sh/boards/snapgear/rtc.c b/arch/sh/boards/snapgear/rtc.c
new file mode 100644
index 000000000000..b71e009da35c
--- /dev/null
+++ b/arch/sh/boards/snapgear/rtc.c
@@ -0,0 +1,333 @@
+/****************************************************************************/
+/*
+ * linux/arch/sh/boards/snapgear/rtc.c -- Secureedge5410 RTC code
+ *
+ *  Copyright (C) 2002  David McCullough <davidm@snapgear.com>
+ *  Copyright (C) 2003  Paul Mundt <lethal@linux-sh.org>
+ *
+ * The SecureEdge5410 can have one of 2 real time clocks, the SH
+ * built in version or the preferred external DS1302.  Here we work out
+ * each to see what we have and then run with it.
+ */
+/****************************************************************************/
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/time.h>
+#include <linux/rtc.h>
+#include <linux/mc146818rtc.h>
+
+#include <asm/io.h>
+#include <asm/rtc.h>
+#include <asm/mc146818rtc.h>
+
+/****************************************************************************/
+
+static int use_ds1302 = 0;
+
+/****************************************************************************/
+/*
+ *	we need to implement a DS1302 driver here that can operate in
+ *	conjunction with the builtin rtc driver which is already quite friendly
+ */
+/*****************************************************************************/
+
+#define	RTC_CMD_READ	0x81		/* Read command */
+#define	RTC_CMD_WRITE	0x80		/* Write command */
+
+#define	RTC_ADDR_YEAR	0x06		/* Address of year register */
+#define	RTC_ADDR_DAY	0x05		/* Address of day of week register */
+#define	RTC_ADDR_MON	0x04		/* Address of month register */
+#define	RTC_ADDR_DATE	0x03		/* Address of day of month register */
+#define	RTC_ADDR_HOUR	0x02		/* Address of hour register */
+#define	RTC_ADDR_MIN	0x01		/* Address of minute register */
+#define	RTC_ADDR_SEC	0x00		/* Address of second register */
+
+#define	RTC_RESET	0x1000
+#define	RTC_IODATA	0x0800
+#define	RTC_SCLK	0x0400
+
+#define set_dirp(x)
+#define get_dirp(x) 0
+#define set_dp(x)	SECUREEDGE_WRITE_IOPORT(x, 0x1c00)
+#define get_dp(x)	SECUREEDGE_READ_IOPORT()
+
+static void ds1302_sendbits(unsigned int val)
+{
+	int	i;
+
+	for (i = 8; (i); i--, val >>= 1) {
+		set_dp((get_dp() & ~RTC_IODATA) | ((val & 0x1) ? RTC_IODATA : 0));
+		set_dp(get_dp() | RTC_SCLK);	// clock high
+		set_dp(get_dp() & ~RTC_SCLK);	// clock low
+	}
+}
+
+static unsigned int ds1302_recvbits(void)
+{
+	unsigned int	val;
+	int		i;
+
+	for (i = 0, val = 0; (i < 8); i++) {
+		val |= (((get_dp() & RTC_IODATA) ? 1 : 0) << i);
+		set_dp(get_dp() | RTC_SCLK);	// clock high
+		set_dp(get_dp() & ~RTC_SCLK);	// clock low
+	}
+	return(val);
+}
+
+static unsigned int ds1302_readbyte(unsigned int addr)
+{
+	unsigned int	val;
+	unsigned long	flags;
+
+#if 0
+	printk("SnapGear RTC: ds1302_readbyte(addr=%x)\n", addr);
+#endif
+
+	local_irq_save(flags);
+	set_dirp(get_dirp() | RTC_RESET | RTC_IODATA | RTC_SCLK);
+	set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK));
+
+	set_dp(get_dp() | RTC_RESET);
+	ds1302_sendbits(((addr & 0x3f) << 1) | RTC_CMD_READ);
+	set_dirp(get_dirp() & ~RTC_IODATA);
+	val = ds1302_recvbits();
+	set_dp(get_dp() & ~RTC_RESET);
+	local_irq_restore(flags);
+
+	return(val);
+}
+
+static void ds1302_writebyte(unsigned int addr, unsigned int val)
+{
+	unsigned long	flags;
+
+#if 0
+	printk("SnapGear RTC: ds1302_writebyte(addr=%x)\n", addr);
+#endif
+
+	local_irq_save(flags);
+	set_dirp(get_dirp() | RTC_RESET | RTC_IODATA | RTC_SCLK);
+	set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK));
+	set_dp(get_dp() | RTC_RESET);
+	ds1302_sendbits(((addr & 0x3f) << 1) | RTC_CMD_WRITE);
+	ds1302_sendbits(val);
+	set_dp(get_dp() & ~RTC_RESET);
+	local_irq_restore(flags);
+}
+
+static void ds1302_reset(void)
+{
+	unsigned long	flags;
+	/* Hardware dependant reset/init */
+	local_irq_save(flags);
+	set_dirp(get_dirp() | RTC_RESET | RTC_IODATA | RTC_SCLK);
+	set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK));
+	local_irq_restore(flags);
+}
+
+/*****************************************************************************/
+
+static inline int bcd2int(int val)
+{
+	return((((val & 0xf0) >> 4) * 10) + (val & 0xf));
+}
+
+static inline int int2bcd(int val)
+{
+	return(((val / 10) << 4) + (val % 10));
+}
+
+/*****************************************************************************/
+/*
+ *	Write and Read some RAM in the DS1302,  if it works assume it's there
+ *	Otherwise use the SH4 internal RTC
+ */
+
+void snapgear_rtc_gettimeofday(struct timespec *);
+int snapgear_rtc_settimeofday(const time_t);
+
+void __init secureedge5410_rtc_init(void)
+{
+	unsigned char *test = "snapgear";
+	int i;
+
+	ds1302_reset();
+
+	use_ds1302 = 1;
+
+	for (i = 0; test[i]; i++)
+		ds1302_writebyte(32 + i, test[i]);
+
+	for (i = 0; test[i]; i++)
+		if (ds1302_readbyte(32 + i) != test[i]) {
+			use_ds1302 = 0;
+			break;
+		}
+
+	if (use_ds1302) {
+		rtc_get_time = snapgear_rtc_gettimeofday;
+		rtc_set_time = snapgear_rtc_settimeofday;
+	} else {
+		rtc_get_time = sh_rtc_gettimeofday;
+		rtc_set_time = sh_rtc_settimeofday;
+	}
+		
+	printk("SnapGear RTC: using %s rtc.\n", use_ds1302 ? "ds1302" : "internal");
+}
+
+/****************************************************************************/
+/*
+ *	our generic interface that chooses the correct code to use
+ */
+
+void snapgear_rtc_gettimeofday(struct timespec *ts)
+{
+	unsigned int sec, min, hr, day, mon, yr;
+
+	if (!use_ds1302) {
+		sh_rtc_gettimeofday(ts);
+		return;
+	}
+
+ 	sec = bcd2int(ds1302_readbyte(RTC_ADDR_SEC));
+ 	min = bcd2int(ds1302_readbyte(RTC_ADDR_MIN));
+ 	hr  = bcd2int(ds1302_readbyte(RTC_ADDR_HOUR));
+ 	day = bcd2int(ds1302_readbyte(RTC_ADDR_DATE));
+ 	mon = bcd2int(ds1302_readbyte(RTC_ADDR_MON));
+ 	yr  = bcd2int(ds1302_readbyte(RTC_ADDR_YEAR));
+
+bad_time:
+	if (yr > 99 || mon < 1 || mon > 12 || day > 31 || day < 1 ||
+	    hr > 23 || min > 59 || sec > 59) {
+		printk(KERN_ERR
+		       "SnapGear RTC: invalid value, resetting to 1 Jan 2000\n");
+		ds1302_writebyte(RTC_ADDR_MIN,  min = 0);
+		ds1302_writebyte(RTC_ADDR_HOUR, hr  = 0);
+		ds1302_writebyte(RTC_ADDR_DAY,        7);
+		ds1302_writebyte(RTC_ADDR_DATE, day = 1);
+		ds1302_writebyte(RTC_ADDR_MON,  mon = 1);
+		ds1302_writebyte(RTC_ADDR_YEAR, yr  = 0);
+		ds1302_writebyte(RTC_ADDR_SEC,  sec = 0);
+	}
+
+	ts->tv_sec = mktime(2000 + yr, mon, day, hr, min, sec);
+	if (ts->tv_sec < 0) {
+#if 0
+		printk("BAD TIME %d %d %d %d %d %d\n", yr, mon, day, hr, min, sec);
+#endif
+		yr = 100;
+		goto bad_time;
+	}
+	ts->tv_nsec = 0;
+}
+
+int snapgear_rtc_settimeofday(const time_t secs)
+{
+	int retval = 0;
+	int real_seconds, real_minutes, cmos_minutes;
+	unsigned long nowtime;
+
+	if (!use_ds1302)
+		return sh_rtc_settimeofday(secs);
+
+/*
+ *	This is called direct from the kernel timer handling code.
+ *	It is supposed to synchronize the kernel clock to the RTC.
+ */
+
+	nowtime = secs;
+
+#if 1
+	printk("SnapGear RTC: snapgear_rtc_settimeofday(nowtime=%ld)\n", nowtime);
+#endif
+
+	/* STOP RTC */
+	ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) | 0x80);
+
+	cmos_minutes = bcd2int(ds1302_readbyte(RTC_ADDR_MIN));
+
+	/*
+	 * since we're only adjusting minutes and seconds,
+	 * don't interfere with hour overflow. This avoids
+	 * messing with unknown time zones but requires your
+	 * RTC not to be off by more than 15 minutes
+	 */
+	real_seconds = nowtime % 60;
+	real_minutes = nowtime / 60;
+	if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1)
+		real_minutes += 30;	/* correct for half hour time zone */
+	real_minutes %= 60;
+
+	if (abs(real_minutes - cmos_minutes) < 30) {
+		ds1302_writebyte(RTC_ADDR_MIN, int2bcd(real_minutes));
+		ds1302_writebyte(RTC_ADDR_SEC, int2bcd(real_seconds));
+	} else {
+		printk(KERN_WARNING
+		       "SnapGear RTC: can't update from %d to %d\n",
+		       cmos_minutes, real_minutes);
+		retval = -1;
+	}
+
+	/* START RTC */
+	ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) & ~0x80);
+	return(0);
+}
+
+unsigned char secureedge5410_cmos_read(int addr)
+{
+	unsigned char val = 0;
+
+	if (!use_ds1302)
+		return(__CMOS_READ(addr, w));
+
+	switch(addr) {
+	case RTC_SECONDS:       val = ds1302_readbyte(RTC_ADDR_SEC);  break;
+	case RTC_SECONDS_ALARM:                                       break;
+	case RTC_MINUTES:       val = ds1302_readbyte(RTC_ADDR_MIN);  break;
+	case RTC_MINUTES_ALARM:                                       break;
+	case RTC_HOURS:         val = ds1302_readbyte(RTC_ADDR_HOUR); break;
+	case RTC_HOURS_ALARM:                                         break;
+	case RTC_DAY_OF_WEEK:   val = ds1302_readbyte(RTC_ADDR_DAY);  break;
+	case RTC_DAY_OF_MONTH:  val = ds1302_readbyte(RTC_ADDR_DATE); break;
+	case RTC_MONTH:         val = ds1302_readbyte(RTC_ADDR_MON);  break;
+	case RTC_YEAR:          val = ds1302_readbyte(RTC_ADDR_YEAR); break;
+	case RTC_REG_A:         /* RTC_FREQ_SELECT */                 break;
+	case RTC_REG_B:	        /* RTC_CONTROL */                     break;
+	case RTC_REG_C:	        /* RTC_INTR_FLAGS */                  break;
+	case RTC_REG_D:         val = RTC_VRT /* RTC_VALID */;        break;
+	default:                                                      break;
+	}
+
+	return(val);
+}
+
+void secureedge5410_cmos_write(unsigned char val, int addr)
+{
+	if (!use_ds1302) {
+		__CMOS_WRITE(val, addr, w);
+		return;
+	}
+
+	switch(addr) {
+	case RTC_SECONDS:       ds1302_writebyte(RTC_ADDR_SEC, val);  break;
+	case RTC_SECONDS_ALARM:                                       break;
+	case RTC_MINUTES:       ds1302_writebyte(RTC_ADDR_MIN, val);  break;
+	case RTC_MINUTES_ALARM:                                       break;
+	case RTC_HOURS:         ds1302_writebyte(RTC_ADDR_HOUR, val); break;
+	case RTC_HOURS_ALARM:                                         break;
+	case RTC_DAY_OF_WEEK:   ds1302_writebyte(RTC_ADDR_DAY, val);  break;
+	case RTC_DAY_OF_MONTH:  ds1302_writebyte(RTC_ADDR_DATE, val); break;
+	case RTC_MONTH:         ds1302_writebyte(RTC_ADDR_MON, val);  break;
+	case RTC_YEAR:          ds1302_writebyte(RTC_ADDR_YEAR, val); break;
+	case RTC_REG_A:         /* RTC_FREQ_SELECT */                 break;
+	case RTC_REG_B:        	/* RTC_CONTROL */                     break;
+	case RTC_REG_C:	        /* RTC_INTR_FLAGS */                  break;
+	case RTC_REG_D:	        /* RTC_VALID */                       break;
+	default:                                                      break;
+	}
+}
+
+/****************************************************************************/
diff --git a/arch/sh/boards/snapgear/setup.c b/arch/sh/boards/snapgear/setup.c
new file mode 100644
index 000000000000..08fc98342a0b
--- /dev/null
+++ b/arch/sh/boards/snapgear/setup.c
@@ -0,0 +1,216 @@
+/****************************************************************************/
+/* 
+ * linux/arch/sh/boards/snapgear/setup.c
+ *
+ * Copyright (C) 2002  David McCullough <davidm@snapgear.com>
+ * Copyright (C) 2003  Paul Mundt <lethal@linux-sh.org>
+ *
+ * Based on files with the following comments:
+ *
+ *           Copyright (C) 2000  Kazumoto Kojima
+ *
+ *           Modified for 7751 Solution Engine by
+ *           Ian da Silva and Jeremy Siegel, 2001.
+ */
+/****************************************************************************/
+
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/interrupt.h>
+#include <linux/timer.h>
+#include <linux/delay.h>
+#include <linux/module.h>
+#include <linux/sched.h>
+
+#include <asm/machvec.h>
+#include <asm/mach/io.h>
+#include <asm/irq.h>
+#include <asm/io.h>
+#include <asm/cpu/timer.h>
+
+extern void (*board_time_init)(void);
+extern void secureedge5410_rtc_init(void);
+extern void pcibios_init(void);
+
+/****************************************************************************/
+/*
+ * EraseConfig handling functions
+ */
+
+static irqreturn_t eraseconfig_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+{
+	volatile char dummy __attribute__((unused)) = * (volatile char *) 0xb8000000;
+
+	printk("SnapGear: erase switch interrupt!\n");
+
+	return IRQ_HANDLED;
+}
+
+static int __init eraseconfig_init(void)
+{
+	printk("SnapGear: EraseConfig init\n");
+	/* Setup "EraseConfig" switch on external IRQ 0 */
+	if (request_irq(IRL0_IRQ, eraseconfig_interrupt, SA_INTERRUPT,
+				"Erase Config", NULL))
+		printk("SnapGear: failed to register IRQ%d for Reset witch\n",
+				IRL0_IRQ);
+	else
+		printk("SnapGear: registered EraseConfig switch on IRQ%d\n",
+				IRL0_IRQ);
+	return(0);
+}
+
+module_init(eraseconfig_init);
+
+/****************************************************************************/
+/*
+ * Initialize IRQ setting
+ *
+ * IRL0 = erase switch
+ * IRL1 = eth0
+ * IRL2 = eth1
+ * IRL3 = crypto
+ */
+
+static void __init init_snapgear_IRQ(void)
+{
+	/* enable individual interrupt mode for externals */
+	ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
+
+	printk("Setup SnapGear IRQ/IPR ...\n");
+
+	make_ipr_irq(IRL0_IRQ, IRL0_IPR_ADDR, IRL0_IPR_POS, IRL0_PRIORITY);
+	make_ipr_irq(IRL1_IRQ, IRL1_IPR_ADDR, IRL1_IPR_POS, IRL1_PRIORITY);
+	make_ipr_irq(IRL2_IRQ, IRL2_IPR_ADDR, IRL2_IPR_POS, IRL2_PRIORITY);
+	make_ipr_irq(IRL3_IRQ, IRL3_IPR_ADDR, IRL3_IPR_POS, IRL3_PRIORITY);
+}
+
+/****************************************************************************/
+/*
+ *	Fast poll interrupt simulator.
+ */
+
+/*
+ * Leave all of the fast timer/fast poll stuff commented out for now, since
+ * it's not clear whether it actually works or not. Since it wasn't being used
+ * at all in 2.4, we'll assume it's not sane for 2.6 either.. -- PFM
+ */
+#if 0
+#define FAST_POLL	1000
+//#define FAST_POLL_INTR
+
+#define FASTTIMER_IRQ   17
+#define FASTTIMER_IPR_ADDR  INTC_IPRA
+#define FASTTIMER_IPR_POS    2
+#define FASTTIMER_PRIORITY   3
+
+#ifdef FAST_POLL_INTR
+#define TMU1_TCR_INIT	0x0020
+#else
+#define TMU1_TCR_INIT	0
+#endif
+#define TMU_TSTR_INIT	1
+#define TMU1_TCR_CALIB	0x0000
+
+
+#ifdef FAST_POLL_INTR
+static void fast_timer_irq(int irq, void *dev_instance, struct pt_regs *regs)
+{
+	unsigned long timer_status;
+    timer_status = ctrl_inw(TMU1_TCR);
+	timer_status &= ~0x100;
+	ctrl_outw(timer_status, TMU1_TCR);
+}
+#endif
+
+/*
+ * return the current ticks on the fast timer
+ */
+
+unsigned long fast_timer_count(void)
+{
+	return(ctrl_inl(TMU1_TCNT));
+}
+
+/*
+ * setup a fast timer for profiling etc etc
+ */
+
+static void setup_fast_timer()
+{
+	unsigned long interval;
+
+#ifdef FAST_POLL_INTR
+	interval = (current_cpu_data.module_clock/4 + FAST_POLL/2) / FAST_POLL;
+
+	make_ipr_irq(FASTTIMER_IRQ, FASTTIMER_IPR_ADDR, FASTTIMER_IPR_POS,
+			FASTTIMER_PRIORITY);
+
+	printk("SnapGear: %dHz fast timer on IRQ %d\n",FAST_POLL,FASTTIMER_IRQ);
+
+	if (request_irq(FASTTIMER_IRQ, fast_timer_irq, 0, "SnapGear fast timer",
+			NULL) != 0)
+		printk("%s(%d): request_irq() failed?\n", __FILE__, __LINE__);
+#else
+	printk("SnapGear: fast timer running\n",FAST_POLL,FASTTIMER_IRQ);
+	interval = 0xffffffff;
+#endif
+
+	ctrl_outb(ctrl_inb(TMU_TSTR) & ~0x2, TMU_TSTR); /* disable timer 1 */
+	ctrl_outw(TMU1_TCR_INIT, TMU1_TCR);
+	ctrl_outl(interval, TMU1_TCOR);
+	ctrl_outl(interval, TMU1_TCNT);
+	ctrl_outb(ctrl_inb(TMU_TSTR) | 0x2, TMU_TSTR); /* enable timer 1 */
+
+	printk("Timer count 1 = 0x%x\n", fast_timer_count());
+	udelay(1000);
+	printk("Timer count 2 = 0x%x\n", fast_timer_count());
+}
+#endif
+
+/****************************************************************************/
+
+const char *get_system_type(void)
+{
+	return "SnapGear SecureEdge5410";
+}
+
+/*
+ * The Machine Vector
+ */
+
+struct sh_machine_vector mv_snapgear __initmv = {
+	.mv_nr_irqs		= 72,
+
+	.mv_inb			= snapgear_inb,
+	.mv_inw			= snapgear_inw,
+	.mv_inl			= snapgear_inl,
+	.mv_outb		= snapgear_outb,
+	.mv_outw		= snapgear_outw,
+	.mv_outl		= snapgear_outl,
+
+	.mv_inb_p		= snapgear_inb_p,
+	.mv_inw_p		= snapgear_inw,
+	.mv_inl_p		= snapgear_inl,
+	.mv_outb_p		= snapgear_outb_p,
+	.mv_outw_p		= snapgear_outw,
+	.mv_outl_p		= snapgear_outl,
+
+	.mv_isa_port2addr	= snapgear_isa_port2addr,
+
+	.mv_init_irq		= init_snapgear_IRQ,
+};
+ALIAS_MV(snapgear)
+
+/*
+ * Initialize the board
+ */
+
+int __init platform_setup(void)
+{
+	board_time_init = secureedge5410_rtc_init;
+
+	return 0;
+}
+