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| author | Ingo Molnar <mingo@elte.hu> | 2008-07-29 00:07:55 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-07-29 00:07:55 +0200 |
| commit | cb28a1bbdb4790378e7366d6c9ee1d2340b84f92 (patch) | |
| tree | 316436f77dac75335fd2c3ef5f109e71606c50d3 /arch/sh/drivers/pci/fixups-sh7785lcr.c | |
| parent | dma-coherent: add documentation to new interfaces (diff) | |
| parent | Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dto... (diff) | |
| download | linux-cb28a1bbdb4790378e7366d6c9ee1d2340b84f92.tar.xz linux-cb28a1bbdb4790378e7366d6c9ee1d2340b84f92.zip | |
Merge branch 'linus' into core/generic-dma-coherent
Conflicts:
arch/x86/Kconfig
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/sh/drivers/pci/fixups-sh7785lcr.c')
| -rw-r--r-- | arch/sh/drivers/pci/fixups-sh7785lcr.c | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/arch/sh/drivers/pci/fixups-sh7785lcr.c b/arch/sh/drivers/pci/fixups-sh7785lcr.c new file mode 100644 index 000000000000..4949e601387a --- /dev/null +++ b/arch/sh/drivers/pci/fixups-sh7785lcr.c @@ -0,0 +1,46 @@ +/* + * arch/sh/drivers/pci/fixups-sh7785lcr.c + * + * R0P7785LC0011RL PCI fixups + * Copyright (C) 2008 Yoshihiro Shimoda + * + * Based on arch/sh/drivers/pci/fixups-r7780rp.c + * Copyright (C) 2003 Lineo uSolutions, Inc. + * Copyright (C) 2004 - 2006 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include <linux/pci.h> +#include "pci-sh4.h" + +int pci_fixup_pcic(void) +{ + pci_write_reg(0x000043ff, SH4_PCIINTM); + pci_write_reg(0x0000380f, SH4_PCIAINTM); + + pci_write_reg(0xfbb00047, SH7780_PCICMD); + pci_write_reg(0x00000000, SH7780_PCIIBAR); + + pci_write_reg(0x00011912, SH7780_PCISVID); + pci_write_reg(0x08000000, SH7780_PCICSCR0); + pci_write_reg(0x0000001b, SH7780_PCICSAR0); + pci_write_reg(0xfd000000, SH7780_PCICSCR1); + pci_write_reg(0x0000000f, SH7780_PCICSAR1); + + pci_write_reg(0xfd000000, SH7780_PCIMBR0); + pci_write_reg(0x00fc0000, SH7780_PCIMBMR0); + +#ifdef CONFIG_32BIT + pci_write_reg(0xc0000000, SH7780_PCIMBR2); + pci_write_reg(0x20000000 - SH7780_PCI_IO_SIZE, SH7780_PCIMBMR2); +#endif + + /* Set IOBR for windows containing area specified in pci.h */ + pci_write_reg((PCIBIOS_MIN_IO & ~(SH7780_PCI_IO_SIZE - 1)), + SH7780_PCIIOBR); + pci_write_reg(((SH7780_PCI_IO_SIZE - 1) & (7 << 18)), SH7780_PCIIOBMR); + + return 0; +} |